Credits:
Semesters Offered
Learning Objectives
- Use simulation, test, and measurement equipment to evaluate the functionality and performance of simple digital circuits and systems
- Understand basic limitations, inaccuracies, and tolerances of the test equipment, components, and procedures
- Design digital circuits and systems to efficiently, reliably, and economically achieve desired results
- Master techniques for modeling and troubleshooting circuits and systems through structural and gate-level networks and breadboard designs
- Use the Verilog hardware description language and simulation tools to design circuits and systems and analyze their performance
- Work cooperatively with others in the lab to maximize results
Topics Covered
- Verilog syntax and structure
- Verilog structural and gate-level modeling
- Simulation environment for schematics and verilog models
- Adder circuits: full-adder components, ripple-carry and carry-lookahead structures
- Encoders, decoders, and seven-segment displays
- Asynchronous and synchronous counters
- Verilog modeling with level-sensitive and edge-sensitive behaviors
- Digital data representation and conversions
- Sequence analyzers and finite state machine design
- Combinational and sequential multiplier circuits
- Digital calculator implementation
- First-in first-out (FIFO) buffer design
- Error detection and correction codes
Learning Outcomes
- Ability to apply knowledge of math, science, & engineering (Significant)
- Ability to design/conduct experiments and analyze/interpret data (Significant)
- Ability to design a system, component, or process to meet needs (Significant)
- Ability to function on a multi-disciplinary team (Moderate)
- Ability to identify, formulate, and solve engineering problems (Significant)
- Ability to communicate effectively (Moderate)
- Knowledge of contemporary issues (Moderate)
- Techniques, skills, and modern engineering tools necessary for engineering practice (Significant)