Nanoelectronics laboratory: Molecular Beam Epitaxy Facility

As part of Prof. Yang's Nanoelectronics Laboratory, this facility is located in the Laboratory for Physical Sciences. the instrument is a UHV (Ultra-High Vacuum) crystal growth system, for the growth of device-quality, epitaxial silicides on silicon. The system has a single-source, load-lock UHV chamber, and the following important features: two effusion cells for co-depositing silicon and metals, one e-beam source for evaporating refractory metals, one temperature-controlled substrate holder, and optical access to the substrate for pyrometry and ellipsometry. The in situ analysis tools that will go with the system include: RHEED gun/screen for surface structure identification and ellipsometer for measurement of film thickness and index of refraction. Ex situ analysis include STM, BEEM, TEM, PEEM, SEM, EBIC, CL, and EDS (Energy Dispersive Spectroscopy) X-ray system for composition analysis. The silicides have been widely applied in the fabrication of advanced, deep sub-micron silicon-based integrated circuits for their low resistivity and full compatibility with the silicon-based material system. Yet, there are many unanswered questions in terms of their properties and reliability, especially at the silicide interface with silicon and interconnect metals. Further improvement of epitaxial silicide is therefore vital for scaling MOSFETs. In addition to developing the growth techniques and investigating their fundamental properties, such as their effective mass, transport physics, conductivity, reliability, size-quantization effects, etc., we will specifically apply the epitaxial silicides in the fabrication of ultrasmall MOSFETs.

This patent-pending new MOSFET structure uses the silicide/silicon heterojunction to totally remove the infamous Short-Channel Effect, and, as a result, the effective channel length can be down scaled to about 10 nanometers. Compared with today's perceived MOSFET scaling limit (About 100 nm, according to The National Technology Roadmap For Semiconductors, Semiconductor Industry Association, 1994.), such a scalability represents a factor of 100 further increase in packing density. Recent computer simulation has provided promising results, including the transistor characteristics, transient performance in logic circuits, and optimized structural parameters. Our immediate goal is to experimentally realize the World's Smallest MOSFETs using our silicide/silicon heterojunctions. Successful results will for sure bring a significant impact to the highly competitive IC industry.