Publications

Journal Papers:
  1. Low-Cost and Energy-Efficient Distributed Synchronization for Embedded Multiprocessors [ PDF | BibTex ]
    C. Yu, P. Petrov
    to appear in IEEE Transactions on Very Large Scale Integration Systems (TVLSI)

  2. Cache Partitioning for Energy-Efficient and Interference-Free Embedded Multitasking [ PDF | BibTex ]
    R. Reddy, P. Petrov
    to appear in ACM Transactions on Embedded Computing Systems (TECS)

  3. Low-Power Snoop Architecture for Synchronized Producer-Consumer Embedded Multiprocessing [ PDF | BibTex ]
    C. Yu, P. Petrov
    to appear in IEEE Transactions on Very Large Scale Integration Systems (TVLSI)

  4. Temperature-Aware Register Re-Allocation for Register File Power-Density Minimization [ PDF | BibTex ]
    X. Zhou, C. Yu, P. Petrov
    ACM Transactions on Design Automation of Electronic Systems (TODAES), March 2009

  5. Cross-Layer Customization for Rapid and Low-Cost Task Preemption in Multi-Tasked Embedded Systems. [ PDF | BibTex ]
    X. Zhou, P. Petrov
    ACM Transactions on Embedded Computing Systems (TECS), January 2009

  6. Direct Address Translation for Virtual Memory in Energy-Effcient and Real-Time Embedded Systems [ PDF | BibTex ]
    X. Zhou, P. Petrov
    ACM Transactions on Embedded Computing Systems (TECS), December 2008

  7. Heterogeneously Tagged Caches for Low-Power Embedded Systems with Virtual Memory Support [ PDF | BibTex ]
    X. Zhou, P. Petrov
    ACM Transactions on Design Automation of Electronic Systems (TODAES), April, 2008

  8. Low Power and Real-Time Translation through Arithmetic Operations for Virtual Memory Support in Embedded Systems [ PDF | BibTex ]
    X. Zhou, P. Petrov
    IET Computers and Digital Techniques (CDT), March 2008

  9. Application-Aware Snoop Filtering for Low-Power Cache Coherence in Embedded Multiprocessors [ PDF | BibTex ]
    X. Zhou, C. Yu, A. Dash, P. Petrov
    ACM Transactions on Design Automation of Electronic Systems (TODAES), January 2008

  10. Dynamic Tag Reduction for Low-Power Caches in Embedded Systems with Virtual Memory Multiprocessors [ PDF | BibTex ]
    P.Petrov, A. Orailoglu
    International Journal of Parallel Programming (IJPP), Springer Netherlands, April 2007

  11. A Reprogrammable Customization Framework for Efficient Branch Resolution in Embedded Processors [ PDF | BibTex ]
    P.Petrov, A. Orailoglu
    ACM Transactions on Embedded Computing Systems (TECS), May 2005.

  12. Low-power Branch Target Buffer for Application-Specific Embedded Processors [ PDF | BibTex ]
    P.Petrov, A. Orailoglu
    IEE Proceedings Computers & Digital Techniques, 2005.

  13. Tag compression for low-power in dynamically customizable embedded processors [ PDF | BibTex ]
    P.Petrov, A. Orailoglu
    IEEE Transactions on CAD (TCAD), July, 2004

  14. Low-power Instruction Bus Encoding for Embedded Processors [ PDF | BibTex ]
    P.Petrov, A. Orailoglu
    IEEE Transactions on VLSI (TVLSI), July, 2004

  15. Transforming Binary Code for Low-Power Embedded Processors [ PDF | BibTex ]
    P.Petrov, A. Orailoglu
    IEEE Micro, May 2004

  16. Application-Specific Instruction Memory Customizations for Power Efficient Embedded Processors [ PDF | BibTex ]
    P.Petrov, A. Orailoglu
    IEEE Design and Test of Computers magazine, January 2003

  17. Performance and Power Effectiveness in Embedded Processors - Customizable Partitioned Caches [ PDF | BibTex ]
    P.Petrov, A. Orailoglu
    IEEE Transactions on CAD (TCAD), November 2001

Refereed Conference and Workshop Papers:
  1. Low-power Inter-core Communication through Cache Partitioning in Embedded Multiprocessors [ PDF | BibTex ]
    C. Yu, X. Zhou, P. Petrov
    ACM Symposium on Integrated Circuits and Systems Design (SBCCI), September 2009

  2. Dynamic and Application-Driven Instruction Cache Partitioning for Energy-Efficient Embedded Multitasking [ PDF | BibTex ]
    M. Paul, P. Petrov
    IEEE Symposium on Application Specific Processors (SASP), July, 2009

  3. Distributed Synchronization Architecture for Energy and Latency Efficiency in Embedded Multiprocessors [ PDF | BibTex ]
    C. Yu, P. Petrov
    Internation Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), October 2008

  4. Latency and Bandwidth Efficient Communication through System Customization for Embedded Multiprocessors [ PDF | BibTex ]
    C. Yu, P. Petrov
    IEEE/ACM Design Automation Conference (DAC), June 2008

  5. Compiler-driven Register Re-assignment for Register File Power-density and Temperature Reduction [ PDF | BibTex ]
    X. Zhou, C. Yu, P. Petrov
    IEEE/ACM Design Automation Conference (DAC), June 2008

  6. Eliminating Inter-Process Cache Interference through Cache Reconfigurability for Real-Time and Low-Power Embedded Multi-Tasking Systems [ PDF | BibTex ]
    R. Reddy, P. Petrov
    Internation Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), October 2007

  7. Aggressive Snoop Reduction for Synchronized Producer-Consumer Communication in Energy-Efficient Embedded Multi-Processors [ PDF | BibTex ]
    C. Yu, P. Petrov
    Internation Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), October 2007

  8. Application-Driven Register File Mapping for Rapid Task Preemption in Real-Time Multi-Tasked Embedded Systems [ PDF | BibTex ]
    X. Zhou, P. Petrov
    Workshop on Application Specific Processors (WASP), October 2007

  9. The Interval Page Table: Virtual Memory Support in Real-Time and Memory-Constrained Embedded Systems [ PDF | BibTex ]
    X. Zhou, P. Petrov
    ACM Symposium on Integrated Circuits and Systems Design (SBCCI), September 2007

  10. Rapid and Low-Cost Context-Switch through Embedded Processor Customization for Real-Time and Control Applications [ PDF | BibTex ]
    X. Zhou, P. Petrov
    Design Automation Conference (DAC), July 2006

  11. Energy-Efficient Cache Coherence for Embedded Multi-Processor Systems through Application-Driven Snoop Filtering [ PDF | BibTex ]
    A. Dash, P. Petrov
    EuroMicro Conference on Digital System Design (DSD), August 2006

  12. Low Power Cache Organization Through Selective Tag Translation for Embedded Processors with Virtual Memory Support [ PDF | BibTex ]
    X. Zhou, P. Petrov
    Great Lakes Symposium on VLSI Systems (GLSVLSI), May 2006

  13. Selective physically/virtually-tagged caches for energy-efficient embedded processors [ PDF | BibTex ]
    X. Zhou, P. Petrov
    Workshop on Application Specific Processors (WASP), September 2005

  14. Energy-efficient address translation for virtual memory support in low-power and real-time embedded processors [ PDF | BibTex ]
    X. Zhou, P. Petrov
    International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), September 2005

  15. Arithmetic-based address translation for energy-efficient virtual memory support in low-power, real-time embedded systems [ PDF | BibTex ]
    X. Zhou, P. Petrov
    Symposium on Integrated Circuits and Systems Design (SBCCI), September 2005

  16. Energy-Efficient Physically Tagged Caches for Embedded Processors with Virtual Memory [ PDF | BibTex ]
    P. Petrov, D. Tracy, A. Orailoglu
    Design Automation Conference (DAC), June 2005

  17. OS Supported Low Power Tag Architecture for Embedded Processors with Virtual Memory [ PDF | BibTex ]
    P. Petrov, D. Tracy, A. Orailoglu
    Workshop on Application Specific Processors (WASP), September 2004

  18. Application specific instruction memory transformations for power efficient, fault resilient embedded processors [ PDF | BibTex ]
    R. Ayoub, P. Petrov, A. Orailoglu
    IEEE International SOC conference, September 2004

  19. Compiler-Based Register Name Adjustment for Low-Power Embedded Processors [ PDF | BibTex ]
    P. Petrov, A. Orailoglu
    International Conference on Computer Aided Design (ICCAD), November 2003

  20. Virtual Page Tag Reduction for Low-power TLBs [ PDF | BibTex ]
    P. Petrov, A. Orailoglu
    International Conference on Computer Design (ICCD), October 2003

  21. Power Efficiency through Application-Specific Instruction Memory Transformations [ PDF | BibTex ]
    P. Petrov, A. Orailoglu
    Design Automation and Test in Europe Conference (DATE), pp. 30-35, 2003

  22. Low-power Branch Target Buffer for Application-Specific Embedded Processors [ PDF | BibTex ]
    P. Petrov, A. Orailoglu
    Euromicro Symposium on Digital System Design (DSD), September 2003

  23. Customizable Embedded Processor Architectures [ PDF | BibTex ]
    P. Petrov, A. Orailoglu
    Euromicro Symposium on Digital System Design (DSD), September 2003

  24. Transformation Driven Power Reduction for Coupled Deep SubMicron Instruction Buses [ PDF | BibTex ]
    P. Petrov, A. Orailoglu
    Workshop on Application Specific Processors (WASP), 2003

  25. Power Efficient Embedded Processor IP's through Application-Specific Tag Compression in Data Caches [ PDF | BibTex ]
    P. Petrov, A. Orailoglu
    Design Automation and Test in Europe Conference (DATE), 2002

  26. Energy Frugal Tags in Reprogrammable I-Caches for Application-Specific Embedded Processors [ PDF | BibTex ]
    P. Petrov, A. Orailoglu
    International Symposium on Hardware/Software Codesign (CODES), May 2002

  27. Low-power Data Memory Communication for Application-Specific Embedded Processors [ PDF | BibTex ]
    P. Petrov, A. Orailoglu
    International Symposium on System Synthesis (ISSS), October 2002

  28. Instruction Memory Transformations for Low-power Application-Specific Embedded Processors [ PDF | BibTex ]
    P. Petrov, A. Orailoglu
    Workshop on Application Specific Processors (WASP), November 2002

  29. Data Cache Energy Minimization through Programmable Tag Size Matching to the Application [ PDF | BibTex ]
    P. Petrov, A. Orailoglu
    International Symposium on System Synthesis (ISSS), September 2001

  30. Speeding Up Control-Dominated Applications through Microarchitectural Customizations in Embedded Processors [ PDF | BibTex ]
    P. Petrov, A. Orailoglu
    Design Automation Conference (DAC), June 2001

  31. Towards Effective Embedded Processors in Codesigns: Customizable Partitioned Caches [ PDF | BibTex ]
    P. Petrov, A. Orailoglu
    International Symposium on Hardware/Software Codesign (CODES), April 2001

  32. Faults in Processor Control Subsystems: Testing Performance and Correctness Faults in the Data Prefetching Unit [ PDF | BibTex ]
    S. Almukhaizim, P. Petrov, A. Orailoglu
    Asian Test Symposium (ATS), November 2001

  33. Low-Cost, Software-Based Self-Test Methodologies for Performance Faults in Processor Control Subsystems [ PDF | BibTex ]
    S. Almukhaizim, P. Petrov, A. Orailoglu
    Custom Integrated Circuits Conference (CICC), May 2001

  34. Application-Driven Customization for Embedded Processors: The Partitioned Cache Architecture [ PDF | BibTex ]
    P. Petrov, A. Orailoglu
    International Workshop on Software and Compilers for Embedded Systems (SCOPES), March 2001

  35. A Methodology for Software-Based Testing of Processor Control Subsystems: The Branch Prediction Case [ PDF | BibTex ]
    S. Almukhaizim, P. Petrov, A. Orailoglu
    International Test Synthesis Workshop (ITSW), March 2001

  36. An Integrated Solution for DFT Library Validation in Industrial Settings [ PDF | BibTex ]
    P. Petrov, C. Borden, A. Orailoglu
    Design Automation and Test in Europe, User's Forum, March 2000