Publications

  1. ``Quasi Complementary Transistor Amplifier", Electronics, Sept. 1956.
  2. ``Effect of Temperature on Junction Transistor Circuits", Transistor I, RCA Lab., 1956.
  3. ``Modulated Transistor Oscillators and Their Applications", Transistor I, RCA Lab., 1956
  4. ``A 20-Watt Transistor Amplifier", Transistor I, RCA Lab., 1956.
  5. ``Transistor Input Stages for Phonograph Pickups", Journal of Audio Engrg. Soc., October, 1956.
  6. ``Determination of Thermal Resistance of Silicon Junction Devices", IRE Nat. Conv. Rec., March 1957.
  7. ``Power Transistor Applications", 1957 Transistor Lecture Series, IRE Dallas Section.
  8. ``Thermal Stability of Junctional Transistors and Its Effect on Maximum Power Dissipation", IRE Trans. on Electron Dev., Jan. 1959.
  9. ``Low Frequency Operations of Transistors", IRE Transistor Workshop Lecture Series, Boston Section, Spring, 1959.
  10. ``Effect of Transient Voltages on Transistors", IRE Trans. on Electron Dev., Jan. 1959.
  11. ``Low Frequency Operations of Transistors", IRE Transistor Workshop Lecture Series, Boston Section, Spring, 1959.
  12. ``Single-Ended Push-Pull Transistor Amplifier", Electronics, May, 1959.
  13. ``Complementary Cascade Amplifier", 1957 Audio Engineering Society Convention - paper.
  14. ``Some Rating and Application Considerations for Silicon Diodes", IRE Trans. on Comp- onent Parts, December 1959.
  15. ``Multivibrator Functional Electronic Blocks", National Aeronautical Elec. Conf.Proc., May 1960.
  16. ``Transient Operation of Transistors with Inductive Load", IRE Trans. on ElectronDev., July 1960.
  17. ``On Using Bulk Resistance and Junction Capacitance in Semiconductor Functional Blocks", 1960 IRE WESCON Convention Record.
  18. ``Analogue Multiplication in a Monolithic Semiconductor Block", Electronics, December 29, 1961.
  19. ``Molecular Electronics and Microsystems", Electrical Engrg., July 1961.
  20. ``Nonlinear Resistance in Microelectronics", 1961 National Elec. Conf. Proc.
  21. ``A Monolithic and Gate with Epitaxial Structure", 1962 National AerospaceElectronics Conference Proc.
  22. ``Step Response of Junction Capacitors", IRE Transaction on Circuit Theory, June 1962.
  23. Book: Co-author, ``Selected Semiconductor Circuits Handbook" (Wiley, 1960).
  24. ``A Unipolar-Bipolar Transistor Configuration for Integrated Audio Amplifier", 1963 Solid Circuit Conference Digest.
  25. ``Diode Operation of a Transistor in Functional Blocks", IEEE Transaction on Electron Devices, May 1963.
  26. ``Design Considerations for Linear Functional Blocks", Solid State Design, July 1964.
  27. ``Low Power Complementary Logic", 1964 NEC Proceedings.
  28. ``Lateral Complementary Transistor for the Simultaneous Fabrication of Functional Blocks", Proc. IEEE, December 1964.
  29. ``Micropower Circuitry", 1965 Military Electronic Meeting Proceedings, February 4, 1965.
  30. ``Integrated Buffer Amplifier", 1965 Solid State Circuit Conference Digest.
  31. ``A Low Noise High Input Impedance Amplifier", 1965 Solid State Circuit ConferenceDigest.
  32. ``SEEC Notes I, Book IV", 1963, Wiley, Co-Author-Book.
  33. ``Integrated High Speed, Low Power Complementary Bipolar Transistor NAND Gate", 1965 WESCON Paper 1.2.
  34. ``MOS Structure as Active Passive Elements", 1965 NEC Proceedings.
  35. ``Design Considerations of Integrated Differential Amplifiers Using Complementary Transistors", 1966 IEEE Region Six Conference Record.
  36. ``Active Passive Multiplication of RC Time Constants for Subaudio Frequency Integrated Filters", 1966 IEEE Region Six Conference Record.
  37. ``Compound Diode-Transistor Structure for Temperature Compensation", PIEEE, September 1966.
  38. ``Gain Control of Integrated Lateral Transistors by Electron Irradiation", 1966 ElectronDevices Meeting Paper.
  39. ``Monolithic Integrated Circuits", 1967 WESCON Symposium Paper.
  40. ``MOS-BI Monolithic MOS - Bipolar Structure", 1967 Electron Devices Meeting Paper.
  41. ``Integrated Electronics" - book published by Holden-Day, San Francisco, September 1967.
  42. ``A Monolithic MOS-Bipolar Audio Amplifier", IEEE Transaction on Broadcast andTelevision Receiver, June 1968.
  43. ``Low Power Integrated Switching Circuits Using Monolithic PNPN Structures", 1968 Microelectronics Symposium and GOMAC Digests.
  44. ``MONOS Memory Element", 1968 GOMAC Digest and Electron Devices Meeting paper.
  45. ``Complementary MOS-Bipolar Structure", 1968 Electron Devices Meeting paper.
  46. ``MNOS Structure as Active, Passive and Storage Elements in Non-Volatile Memory Applications", 1968 NEREM Record.
  47. ``Memory Fatigue in MNOS Field Effect Transistors", 1968 Realiability Physics Symposium Digest.
  48. ``DC Analysis of Multiple Collector and Multiple Emitter Transistors in Integrated Structures", IEEE Solid State Circuits Journal, February 1969.
  49. ``Integrated Semiconductor Memory", 1968 IEEE Circuit Theory Symposium paper.
  50. ``The Application of MNOS Transistors in a Present Counter with Non-Volatile Memory", 1969 ISCC Digest.
  51. ``Complementary MOS - Bipolar Transistor Structure", IEEE Trans. on ED., November 1969. (Co-authors; Ho, Iyer, Kwong).
  52. ``MNOS Load Device", Proc. IEEE, October 1969, (Co-author; Varker).
  53. ``Normally-on Load Device", 1969 NEREM Record, November 1969, (Co-author; Varker).
  54. ``Comparison of Input Offset Voltage of Differential Amplifiers Using Bipolar Transistor and Field Effect Transistors", IEEE Journal of Solic State Circuits, SC-5, June 1970.
  55. ``Silicon Contact for Area Reduction of Integrated Circuits", IEEE Transaction on Electron Devices, ED-17, August 1970.
  56. ``Semiconductor Memories", Science Bulletin of National Chiao Tung University, V, No. 2, January 1972.
  57. ``Shielded CMOS Integrated Structure", IEEE Transactions on Electron Devices, ED-19, November 1972. (Co-author; Halsor, Haynes).
  58. ``Shielded CMOS Integrated Circuits", 1972 GOMAC Digest, March 1973.
  59. ``Computer Analysis of Double-Diffused MOS Transistor for Integrated Circuits", IEEE Transaction on Electron Devices, March 1973.
  60. ``Chemical Vapor Desposition of TItanium Dioxide Thin Film", 1972 International Microelectronics Symposium Digest, October 1972, Washington, DC (Co-author;Hsueh).
  61. ``Characteristics P-N-P-N Switch with Al-Au Schottky Clamp", IEEE Transactions on Electron Devices, December 1973. (Co-author; Schade).
  62. ``Semiconductor Junction Surface Wave Transducer", 1973 IEEE Ultrasonic Symp- osium Proceedings, November 1973. (Co-authors; Papanicolaou, Acevedo, Tauski).
  63. ``Tapered Output Stage for MOS Integrated Circuits", 1974 GOMAC Digest (with Linholm).
  64. ``SiGate Double-Diffused MOS Integrated Circuits", 1974 GOMAC Digest (with Halsor, Benz).
  65. ``Metal-Ti0-Si0-Si Field Effect Transistors", 1974 Electrochemical Society FallMeeting Extended Abstract, October 1974 (with Y. W. Hsueh).
  66. ``Vapor Deposition of Ti0 Thin Film", Presented at the Conference on ElectricalInsulation and Dielectric Phenomena and published in its Annual Report, October 1974 (with Y. E. Hsueh).
  67. ``An Optimized Output Stage for MOS Integrated Circuits", IEEE Journal of SolidState Circuits, Vol. SC-10, pp. 106-109, April 1975 (with L. W. Linholm).
  68. ``Effect of Silicon Gate Resistance on the Frequency Response of MOS Transistors", IEEE Transaction on Electron Devices, Vol. ED-22, p. 255, May 1975 (with Y. Azoumanian, J. . Halsor, M. N. Giuliano, H. Benz).
  69. ``Authors' Comment on An Optimized Output Stage for MOS Integrated Circuits'," IEEE Journal of Solid State Circuit, Vol. SC-10, June 1975 (with L. W. Linholm).
  70. ``Open Circuit Voltage of MIS Schottky Diode Solar Cell", 1975 International Electron Devices Meeting Proceedings, Dec. 1975 (with Peckerar and Kocher).
  71. ``Optimized Load Device for DMOS Integrated Circuits", (with Halsor and Benz), 1975 International Electron Devices Meeting Proceedings, Dec. 1975.
  72. ``Charge Transfer in Si with Surface Acoustic Waves", 1976 Ultrasonic SymposiumProc. (with Papanicolaou).
  73. ``Four Quadient Analog Multiplier for CCD Signal Processing Analog Multiplier", (with Lampe, White and Mack) 1976 GOMAC Digest.
  74. ``Fourier Analysis Computer-Aided Design of CCD Signal Processing Analog Multiplier", (with Lampe, White and Mack) 1976 Conf. on CCD Technology and Appl-ication Proc.
  75. ``MNOS Capacitor Cross-Point Memory", (with Chawla), 1976 IEDM Proceedings.
  76. ``Ion-Implanted Schottky Barrier Solar Cell", (with Pai, Peckerar, Kocher), 1976 IEDMProceedings.
  77. ``A Combined DMOS-VMOS Complementary IC Structure, (with Jhabvala) Electro- chemical Society Meeting Abstract, May 1977.
  78. ``Integrated Electronic Devices" Electronics Designer's Handbook, McGraw Hill, 1977.
  79. ``Current Transport in Ion-Implanted MIS Solar Cells", (with Y. P. Pai, M. C. Peckerar), 1977 IEDM Technical Digest.
  80. ``Weak Accumulation Operation of the N-Channel Deep-Depletion SOS/MOS FET", (with R. R. Jerdonekc and W. R. Bandy), 1977 IEDM Technical Digest.
  81. ``Integrated Electronic Devices", Electronics Designers Handbook, McGraw Hill, 1977
  82. ``Complementary DMOS-VMOS IC Structure", IEEE Trans. ED (with Jhabvala) 1978.
  83. ``Analysis of Ion-Implanted Solar Cell", (with Pai), IEEE Photovoltaic Special Conf. Proc., June, 1978.
  84. ``Contact Resistance of Silver Ink on Solar Cells" (with Spittlehouse Hsueh),IEEE Photovoltaic Special Conf. Proc., June, 1978.
  85. ``A Monolithic SAW-Charge Transfer Device", AIAA/NASA Conference on ``Smart" Sensors. Nov. 15, 1978.
  86. ``High Speed Biplar CCD Input Structure", 1978 IEDM Technical Digest.
  87. ``A monolithic SAW-CCD", 1979 IEEE Solid State Circuits Conference Digest.
  88. ``Modeling of Depletion Mode MOSFET" (with Biehl, White), 1979 ISCAS.
  89. ``Analog Multiplication Utilizing Nonlinear Semiconductor Char.", 1979 ISCAS.
  90. ``Characteristics of Polycrystalline Solar Cells" (with Shorti, Johnson, Wang), 1980, Photovoltaic Specialist Conf.
  91. ``Freg. Scaling for CAD Analysis of Mixer Diode" (with Papanicolaou, McClintock), 1980 IEEE MTT/S.
  92. ``SAW Charge Transfer Device", Optical Engineering, July, 1980 (with Papanicolaou).
  93. ``Depletion layer of Double Diffused Junction", IEEE Trans. Ed., September 1980.
  94. ``Modeling of Non-Pinchoff Depletion MOSFET" (with Biehl and White). IEEE J. of Solid State Ckts., October 1980.
  95. ``A Surface Acoustic Wave Charge Transfer Imager", Proceedings of Society of Photo-optical Instrumentation Engineers, Vol. 244, 1980.
  96. ``Deep Level Transient Spectroscopy Using Spectrum Analyzer", J. Appl. Phys., Feb ruary 1981.
  97. ``Crystallographic Structure Effect on the Electrical Properties of Polysilicon Solar Cells", 1980 IEEE Electron Devices Meeting Digest.
  98. ``Current Transport in an Ion-Implanted Diode", Solid State Electronics, 24, No. 10, pp. 929-934, 1981.
  99. ``Enhanced Photo Response at Dislocation Subgrain Boundaries Revealed by X-ray Topography of Polysilicon Solar Cells", 1981 Materials Research Society Annual Meeting Proceedings.
  100. ``Planar Etch Method for Enhanced Breakdown in Si Junctions", (with Sehnai)Electro Chem. Society Mtg. Proc., May 1982.
  101. ``Crosstalk Measurements on a Linear Array of Deep U-groove Isolated Si Photodiode", (with Kim), 1982 SPIE Proc.
  102. ``CAD Modeling of Diffused p-n Junctions", (with Shenai) COMPEL, Vol. 1, No. 2, pp. 111-127, June, 1982.
  103. ``Extraction of MOSFET DC Model Parameters Using a Partitioned Multi-Dimensional Newton's Method", (with Yan) , IEEE/SIAM Conf. on Numerical Simulation of VLSIDevices.
  104. ``Modeling Total Dose Radiation Effects in Narrow Channel Devices", (with Peckerar et al.). IEEE/SIAM Conf. on Numerical Simulation of VLSI Devices and IEEE Trans.on ED., Sept. 1983.
  105. ``Soft X-ray Effects in MOS Structures", (with Dozier et al.), 1982 GOMAC Digest.
  106. ``Interface Structure of Grain Boundaries in Polysilicon", (with Johnson et al.) 1982 MRS Abstract, p. 93.
  107. ``Structural Characterization of Large Semicrystalline Silicon", (with Regnault et al.) 1982 MRS Abstract, p. 322.
  108. ``Analytical Solutions for Avalance Breakdown Voltages of Single Diffused Gaussian Junctions", (with Shenai) Solid State Electronics, March 1983, p. 211.
  109. ``Modeling Short Channel MOSFET", 1983 NASECODE.
  110. ``Gamma Irradiation Effect on Scaled-down MOSFET on SOS" presented at the 1983 IEEE Radiation Effect Conference.
  111. ``Crosstalk Measurements on a Linear Array of Deep U-Groove Isolated Si Photo Diode" (with Kim) Optical Engineering, July, 1983.
  112. ``Modeling Total Dose Effects in Narrow Channel Devices", IEEE Trans. Ed., ED-30, pp. 1159-1164, Sept. 1983 (with Peckerar, Brown Ma).
  113. ``Analysis of Enhanced Photoresponse Observed at Subgrain Boundaries in Polysilicon solar Cells", IEEE Trans. on Ed., ED-30, pp. 1271-1274, Oct. 1983 (with Johnson).
  114. ``Transient Response of Diffused Junction Capacitors" IEEE Trans. on Ed., ED-30, pp. 1409-1411. (with Sheani).
  115. ``Integrated Circuits Techniques", IEEE Trans. on Circuit Theory CAS-31, pp. 49-63, Jan. 1984.
  116. J. S. Kim and H. C. Lin ``Modeling Effective Source Resistance of a Short-Channel MOSFET", Proceedings of the IEEE Custom Integrated Circuits Conference, May 1984, pp. 335-335.
  117. C. T. Yao and H. C. Lin ``Comments on Small Geometry MOS Transistor Capacitance Measurement Method using on-chip Circuits", IEEE Electron Device Letters, EDL-6, Jan. 1985, pp. 63-64.
  118. C. T. Yao, I. A. Mack and H. C. Lin ``Accuracy of Effective Channel Length Extraction using Capacitance Method", IEEE Electronic Devices Letters, April 1986, pp. 268-270.
  119. ``D. J. Radack, C. T. Yao, L. W. Linholm, K. F. Galloway and H. C. Lin ``Comparison of Microelectronic Test Structures for Propagation Delay Measurements", Microelectronics Journal, Vol-16, No. 6, Nov/Dec. 1985.
  120. C. T. Yao, I. A. Mack and H. C. Lin ``Short-Channel Effects on MOSFET Terminal Capacitance", pp. 400-404, IEEE 1987 Custom Integrated Circuit Conference Proceedings, May 4-7, 1987.
  121. F. J. Kub and H. C. Lin ``Floating Gate Current Sensor", IEEE Device Research Conference Paper, June 22-24, 1987.
  122. H. C. Lin and D. H. Huang ``Calculation of Series Resistance of MISFETs using Schwarz- Christoffel Transformation", 1987 Fifth International Conference on Numerical Analysis of Semiconductor Devices Proceedings, pp. 276-281.
  123. H. C. Lin and S. P. Chiang ``SPICE Simulation of Load Resistance with Distributed Capacitance", 1988 IEEE Circuits and System Symposium Proceedings, pp. 885-888.
  124. ``Transmission Line Model of Base Spreading Resistance at High Currents", IEEE Industrial Applications Society Annual Meeting (with Page and Ostop).
  125. ``An Improved Model for SCR and TRIAC, ditto, (with Wong).
  126. ``Estimate of Increase of Planar Junction Breakdown Voltage with Field Limiting Ring", ditto (with Petrosky, Lamp, Ostop).
  127. ``Depletion Layer Solver for Non-uniform Impurity Profile using Analog Computation Techniques", Electro-Chemical Society Fall Meeting (with A. Shenoy, H. C. Chien, R. Ramaswami).
  128. ``Distributed Model for High Frequency Analysis of High Electronic Mobility Transistor", 1989 National Radio Science Meeting (with D. H. Huang).
  129. ``Mismatch and Asymmetric Characteristics of Concentric MOSFETs", Colorado Microelectronics Conference (with T. H. Kuo).
  130. ``T-gate Short Channel MOSFET", with (C. Hall and S. C. Wong), Electro Chemical Society Spring Meeting paper, May 12, 1989.
  131. ``Three-Transistor Model for Submicron MOSFET", (with S. C. Wong) 1989 IEEE Custom Integrate Circuit Conference Proceedings, May 16, 1989.
  132. ``Nonlinear Charge Control D. C. and Transmission Line Models for GaAs MODFETs" 1989 IEEE International Microwave (with D. H. Huang) Symposium Proceedings, June 13, 1989.
  133. ``Direction Discrimination Hearing Aid" (with M. Jhabvala, Z. S. Wang, Z. T, Chen, Q. Zong), 1989 Conference of Rehabilitation Engineering Society of North America Proceedings, June 1989.
  134. ``DC and Transmission Model for Modulation Doped Field Effect Transistor", (with D. H. Huang) 6th International Symposium on Networks Systems and Signal Processing Proceedings, Zagreb, Yugoslavia, June 27-29, 1989.
  135. ``Lumped Model of Lossy Distributed Line for SPICE", (with S. L. Wang), 1989 International Conference on Circuits and Systems Proceedings, July 6-8, 1989, China.
  136. ``Tunable CMOS Notch Filter" (with Z. S. Wang and L. Tran) 1989 International Conference on Circuits and Systems Proceedings, July 6-8, 1989, China.
  137. ``Analyzing of Microwave Characteristics of GaAs HEMT's using Nonlinear Charge Model", (with D. H. Huang), 1989 SBMO International Microwave Symposium/Brazil, July, 1989.
  138. ``A/D Converter using InGaAs/InAlAs Resonant Tunneling Diodes" (with T. H. Kuo, R. C. Potter, D. Shupe) 1989 IEEE/Cornell University Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits, Proceedings, August 9, 1989.
  139. ``Large Signal Resonant Tunneling Diode Model for SPICE3 Simulation", (with Kuo, Badrikrishnan, Potter, Shupe), IEEE 1989 IEDM Digest, December 1989.
  140. ``Analysis of the Hysteresis in the I-V Characteristics of Vertically Integrated Multi-Peaked Resonant-Tunneling Diodes,'' (with T.H. Kuo, R.C. Potter, D. Shupe), J. APPL. PHYSICS, 68(5), 1 SEPT. 1990, pp. 2496-2498.
  141. ``A Novel A/D Converter Using Resonant Tunneling Diodes,'' (with T.H. Kuo, R.C. Potter, D. Shupl), IEEE J. of Solid State Circuits, Vol. 26, No. 2, Feb. 1991, pp. 145-149.
  142. ``An Efficient Relative Placement Algorithm for Custom Chip Design,'' (with Z.M. Lin), IEEE 1990 Custom Integrated Circuits Conference, pp. 27.1.1.-27.1.4.
  143. ``A New Placement Algorithm for Custom Chip Design,'' (with Z.M. Lin), 1990 IEEE International Symposium on Circuits and Systems, pp. 1672-1675.
  144. ``Signal Processing with Vertically Integrated Resonant Tunneling Diodes,'' (with R.C. Potter, D. Shupe and T.H. Kuo), 1990 IEEE International Symposium on Circuits and Systems, pp. 2557-2561.
  145. ``DC and Transmission Line Models for a High Electron Mobility Transistor", IEEE Trans. on Microwave Theory and Techniques, vol. 37, Sept. 1989 (with D. H. Huang).
  146. ``Simulation of Time-Dependent Tunneling Characteristics of MOS Structure,'' (with R. Ramaswami), Solid State Electronics, Vol. 34, No. 3, pp. 291-299.
  147. ``Simulation of Tunneling Current From Gate Edges of Metal-Oxide-Silicon Structures,'' (with R. Ramaswami and R. Kuchimanchi), J. Applied Phys. 69(9), pp. 6679-6684, May 1991.
  148. ``CMOS Chopper Amplifier for Chemical Sensor,'' (with S.J. Wei), Proc. IEEE Instrumentation and Measurement Technology Conference, pp. 460-462, May 14-16, 1991.
  149. ``DAVE: An Automatic Mixed Analog/Digital IC Layout Compiler,'' (with Z.-M. Lin), Proceedings of IEEE 1991 Custom Integrated Circuits Conference, May 1991.
  150. ``A Multi-State Memory Using Resonant Tunneling Diode Pair,'' (with S.J. Wei), Proc. 1991 IEEE Int. Sym. Circuits Syst., pp. 2924-2927, June 1991.
  151. ``Multiple Peak Resonant Tunneling Diode for Multi-Valued Memory,'' (with S.J. Wei), Proc. 1991 IEEE Int. Symp. Multiple-Valued Logic, pp. 190-195, May 1991.
  152. ``Effect of Dynamic Hystersis on the Operation of RTD Memory,'' (with S.J. Wei, R. Potter and D. Shupe), Proceedings 1991 International Semiconductor Device Research Symposium, pp. 293-297, December 4-6, 1991.
  153. ``Analysis of High Current Distributed Effects on the Base Resistance and Transient Response of Bipolar Transistors,'' (with J.-F. Liang, K. Zaki and K. Petroski), Proc. Int. Conf. on Microelectronics, Egypt, December 21-23, 1991
  154. ``Multi-valued SRAM Cell Using Resonant Tunneling Diodes," IEEE J. Solid State Circuits, Vol. 27, No. 2, Feb. 1992.
  155. ``Dynamic Hystersis of RTD Folding Circuits," IEEE Tran. Ckts. Sys. April 1992.
  156. ``Unique Folding and Hystersis Char. of RTD," Proc. IEEE Sym. Multi-Valued Logic, May 1992.
  157. ``High Speed A/D Converter Using RTD," IEEE Sys. and Ckt Sys. Proc. May, 1992.
  158. ``Multi-valued Counter," IEEE Trans. Computers, Jan. 1992.
  159. ``A 2-Dimensional Multiple-State SRAM Cell Using Resonant Tunneling Diodes," 1993 IEEE International Symposium on Multiple-Valued Logic Conference (with M. H. Hsieh), May 26, 1993.
  160. ``A Self-Latching A/D Converter Using Resonant Tunneling Diodes," IEEE J. of Solid-State Circuits (with Wei et al), June 1993.
  161. ``An Analistic Model for Punchthrough-Implanted MOSFETs in Strong Inversion." Solid-State Electronics, Vol. 38, No. 8, 1993.
  162. ``A Monolithic, Resonant Tunneling Diode-based Analog-to-Digital Converter Built on IP." 1993 IP Conference Proceedings.
  163. ``A Multiple-Dimensional Multiple-State SRAM Cell Using Resonant Tunneling Diodes." IEEE J. Solid State Circuits, May, 1994.
  164. ``Resonant Tunneling Diodes for Multi-Valued Digital Applications." Proc. of 24th Intl. sym. on Multiple-Valued Logic, 1994.
  165. ``Multi-Peak Resonant Tunneling Diodes Based Fuzzifier," Proc. of 24th Intl. Sym. on Multiple-Valued Logic, 1994. (with Tang).
  166. ``Fuzzy Membership Function Circuit Using Hysteretic Resonant Tunneling Diodes," Proc. of 25th Intl. Sym. on Multiple-Value Logic, 1995 (with Tang).
  167. ``Defuzzifier Circuits Using Resonant Tunneling Diodes," Proc. 1995 IEEE Int. Sym. Ckt. Sys. (with Tang).
  168. ``Modeling Hysteresis Current-Voltage for Resonant Tunneling Diodes," IEEE Trans. on CAD/ICAS, 1995 (with Shieh).
  169. ``Multi-valued Decoder Based on Resonant Tunneling Diodes in Current Tapping Mode," Procc. 26th Intl. Sym. on Multiple-Value Logic, 1996 (with Tang).
  170. ``Resonant Tunneling Devices Based Word Memory Cell" (with M.H. Shieh) IEEE Trans Circuits and Systems I: Fundamental Theory and Applications, Vol. 43, No. 7, pp. 583-588, July, 1996.
  171. "Automatic Quadrature Phase Generator" (with M.H. Sun) International Conference on Circuits, Signals & Systems, May 2003.
  172. "2.4 GHz Fully CMOS RF Transceiver for 802.11b Wireless LAN Application" (with W.X. Kong, and C.H. Yeh) Proc. of IEEE Radio and Wireless Conference. pp. 475-478, Sept. 2004.
  173. "2.4 GHz Fully CMOS RF Transceiver for 802.11b Wireless LAN Application" (with W.X. Kong, and C.H. Yeh) Proc. of IEEE International Conference on Electronics, Circuit and Systems, pp. 294-297, Dec. 2004.