Ideas

  • DC-bias inductors to discharge doped region underneath---Need to analyze effects first, just hand-analyzis of a MOS capacitor.
  • For increased resonant frequency, reducing the cap.-to-ground---a junction capacitance under the inductor might work?
  • Modulated inductance with pin-junction under inductor. Need to analyze effects first: Drift-diffusion solver.
  • Coupled frequency-domain solver.


Quick jump to this week.

Weekly Task Lists


Columns: Work type, heading, goals, time if applicable.

21 June 2004
Literature Things to read New papers Bo found: Think about current flow & circuit model. Wong's paper: Patterned substrate. Weisshaar: Circuit model; C(w) explanation. Circuit model for inductor in general: Whence f-dependence of L? Tuesday
Modeling/writing DD and Maxwell equations Write out DD-eqns, Maxwell eqns; determine confluence point Thursday
Simulation/Modeling Make inductor code 3-D Review code mechanics, include metal thickness. Thursday

14 June 2004
Experiment Session with Todd Measurements taken with a DC bias on the inductors in the October chips Thursday Done.
Data Analysis Analyze data gathered w/ DC biasing Plot out results of measurements taken with a DB bias on the inductors in the October chips Thursday Done.
Report Write short report about all inductance measurements to date Measurements taken with or without bias on the inductors in the October chips; include effects of temperature, put in speculations about capacitance, point out trends in doping and frequency Friday Done.
Administrative Travel expense Compile travel expense statement with receipts etc. Friday Done.
Simulation/modeling MOSCAP in 2d freq solver Convert the 2-D frequency solver to a moscap-like geometry Saturday

26 April 2004
Design Deadline for C5N submission! Send out new inductor chips---esp. patterned substrate, on pin junction, also different measurement setup (Y-parameters, as in the Power paper?). Monday Done.

19 April 2004

12 April 2004
Education ITHET Conference paper deadline! Paper about 498c; expand the summary. Wednesday the 16th. Done.

5 April 2004
Theoretical Drift-diffusion solver for pin junction Examine how much we can change conductivity in a region under the inductor Monday/Tuesday
Meeting Xi is here Input? Inclusion of substrate? No ground plane? Need the substr. current estimate results before this. Tuesday Done.

29 March 2004
Simulation Stacked inductor behaviour First-order estimate of capacitance, first-order circuit model, see where the resonance would have occurred Wednesday (in preparation for experiment) Done.
Theoretical Calculate return current depth for our inductors Using assumed process parameters and the methodology in the 1996 Weisshaar et al paper, look at where the return current for our inductors is likely to be. Investigate behaviour in our frequency range, might explain the amount (or lack thereof) of difference between the n-well, p-substrate and grounded poly. Wednesday (in preparation for experiment) Done.
Presentational Prepare figures of the simulation results for the inductors we have manifactured, reorganize results for presentation. Shows expected variation in frequency range. Wednesday Done.
Experimental Inductance measurements Test the other three untested copies of the inductor chip. Make sure we have consistently reproducible measurements for each copy. Thursday afternoon. Done.
Data fitting Inductance data processing Organize and post-process data. Thursday ev./Friday morning. Done.
Data fitting Inductance data processing Interpret results. Use Spectre simulation to curve-fit a basic inductor circuit model. Thursday ev./Friday
Theoretical Derivation of the external self-inductance expression Trace the origin of the equation we use in the inductor modeling program to justify its use. Weekend
Simulation Survey of commercial EM simulation tools What? Does what? Available where?
Theoretical MOS capacitance analysis See what DC-biasing inductor metal might do to the doping underneath for the n-well inductor Weekend


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