ENEE244-010x: Digital Logic Design
Fall 2015 Homeworks
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Homework 1, due in class on Sept. 9
Exercises: 2.3(c),(d); 2.4(c),(d); 2.5(a),(b); 2.6(a),(b);
2.11(a),(b); 2.14(a); 2.22(c),(d) (Assume l = 8); 2.25(a),(b) (Assume l = 8); 2.26(a),(b) (Assume l = 8).
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Homework 2, due in class on Sept 21
Do the following exercises on Hamming codes:
hw_2_ecc.pdf
and the following exercises from the textbook:
3.1(d),(e),(f),(g); 3.5(a),(b); 3.6, 3.8.
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Homework 3, due in class on Sept 30
Do the following exercises on don't care conditions and universal
gates: hw_3_dc.pdf
and the following exercises from the textbook: 3.10(a); 3.11(a),(b); 3.14(a); 3.16(a); 3.17(a); 3.18(b); 3.19(a); 3.24(a).
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Homework 4, due in class on Oct 12
Do the following exercises on implicants and basic logic:
hw_4_logic.pdf.
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Homework 5, due in class on Oct 21
Do the following exercises from the textbook: 4.1; 4.4(c); 4.9(c),(d);
4.11(c),(d); 4.14(c),(d); 4.18; 4.25(a).
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Homework 6, due in class on Oct 28
Do the following exercises on Quine-McCluskey and Prime Implicant Tables:
hw_6_table.pdf
and the following exercises from the textbook: 4.25(c); 4.27(b);
4.29; 4.32; 4.33(b).
For Exercise 4.32, you may solve the problem via table reduction, instead of Petrick's method, if you choose to do so. You need only give one of the multiple-output minimal sums and the cost should be calculated based on number of gate input terminals in the realization.
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Homework 7, due in class on Nov 4
Do the following exercises from the textbook:
5.2(a),(b); 5.3(a),(b),(c),(d); 5.5(a),(b); 5.7, 5.8
For 5.2 see slides from Lecture 3. For Definition of Excess-3 Code See Table 2.8 in the textbook.
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Homework 8, due in class on Nov 23
Do the following exercises from the textbook:
6.11; 6.17; 6.18; 6.39; 6.40(a),(b),(c).
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Homework 9, due in class on Dec 7
Do the following exercises from the textbook:
7.1; 7.2; 7.5; 7.7; 7.9; 7.17(a); 7.18.