Office: AVW 1313
This is me with my wife Kacee, our daughter Celestina, and our puppy Priscilla. UPDATE: Our second daughter was born 2/10/16, picture coming soon
6/20/16 - Start date at Oracle
5/19/16 - Engineering Commencement and PhD Hooding at 6:30pm
5/6/16 - Ph.D. Defense at 2:30pm
4/7/16 - Officially scheduled my Ph.D. Defense for 5/6/16 at 2:30pm.
2/10/16 - My second daughter Abagail Alice Serafy was born at 9:00pm
2/5/16 - Accepted an offer for a Senior Hardware Engineer at Oracle in Santa Clara, CA
I am in my fifth year as a PhD in the Electrical and Computer Engineering Department at University of Maryland, College Park. My advisor is Ankur Srivastava. My research interests lie in thermal-electric-physical co-design of 3D ICs and 3D CPU architectural design space exploration and modeling. I have studied a wide range of 3D IC challenges such as thermally aware floorplanning and global placement, TSV signal integrity optimization, TSV reliability and self-repair, and design-time/run-time thermal management. My most recent work has investigated techniques to predict optimal CPU architectures subject to physical constraints using smoothing spline modeling. I received an MS and BS in Computer Engineering from the ECE department at SUNY Binghamton in 2010 and 2011 respectively.
Curriculum Vitae (CV) (Updated 4/22/16)
|Last Updated: 4/22/2016|