Bruce Jacob: publications

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The slides for several of the talks are available on-line in PDF format.

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Computer Architecture: Refereed Conferences & Journals

  • "DRAM Refresh Mechanisms, Penalties, and Trade-Offs." Ishwar Bhati, Mu-Tien Chang, Zeshan Chishti, Shih-Lien Lu, and Bruce Jacob. IEEE Transactions on Computers, vol. 64, no. X, pp. XXX-XXX. XXX 2015. (to appear)

  • "Flexible auto-refresh: Enabling scalable and energy-efficient DRAM refresh reductions." Ishwar Bhati, Zeshan Chishti, Shih-Lien Lu, and Bruce Jacob. Proc. 42nd International Symposium on Computer Architecture (ISCA 2015), pp. XX-XX. Portland OR, June 2015. (to appear)

  • "The case for VLIW-CMP as a building block for Exascale." Bruce Jacob. IEEE Computer Architecture Letters, published on-line April 2015. DOI 10.1109/LCA.2015.2424699.

  • "Coordinated refresh: Energy efficient techniques for DRAM refresh scheduling." Ishwar Bhati, Zeshan Chishti, and Bruce Jacob. Proc. 2013 International Symposium on Low Power Electronics and Design (ISLPED 2013), pp. 205-210. Beijing, China, September 2013.

  • "Peering over the memory wall: Design space and performance analysis of the Hybrid Memory Cube." Paul Rosenfeld, Elliott Cooper-Balis, Todd Farrell, Dave Resnick, and Bruce Jacob. University of Maryland Systems and Computer Architecture Group Technical Report UMD-SCA-2012-10-01. October 2012 (one reference added 2013).

  • "A journaled, NAND-flash main-memory system." B. Jacob, I. Bhati, M.-T. Chang, P. Rosenfeld, J. Stevens, P. Tschirhart, Z. Chishti, S.-L. Lu, J. Ang, D. Resnick, and A. Rodrigues. University of Maryland Systems and Computer Architecture Group Technical Report UMD-SCA-2010-12-01. December 2010 (some references updated 2014).

  • "The Embedded Reliable Processing System (TERPS)---A robust architecture that achieves forward progress in near-continuous electromagnetic interference." Cagdas Dirik, Amol Gole, Samuel Rodriguez, Hongxia Wang, and Bruce Jacob. University of Maryland Systems and Computer Architecture Group Technical Report UMD-SCA-2004-11-01. November 2004.

  • "Technology comparison for Large Last-Level Caches (L3Cs): Low-leakage SRAM, low write-energy STT-RAM, and refresh-optimized eDRAM." Mu-Tien Chang, Paul Rosenfeld, Shih-Lien Lu, and Bruce Jacob. Proc. 19th International Symposium on High Performance Computer Architecture (HPCA 2013). Shenzhen China, February 2013. (to appear)

  • "Buffer On Board memory systems." Elliott Cooper-Balis, Paul Rosenfeld, and Bruce Jacob. Proc. 39th International Symposium on Computer Architecture (ISCA 2012), pp. 392-403. Portland OR, June 2012.

  • "DRAMSim2: A cycle accurate memory system simulator." Paul Rosenfeld, Elliott Cooper-Balis, and Bruce Jacob. Computer Architecture Letters, vol. 10, no. 1, pp. 16-19. January 2011.

  • "Fine-grained activation for power reduction in DRAM." Elliott Cooper-Balis and Bruce Jacob. IEEE Micro, vol. 30, no. 3, pp. 34-47. May/June 2010.

  • "The performance of PC Solid-State Disks (SSDs) as a function of bandwidth, concurrency, device architecture, and system organization." Cagdas Dirik and Bruce Jacob. Proc. 36th International Symposium on Computer Architecture (ISCA 2009), pp. 279-289. Austin TX, June 2009.

  • "CMP$im: A Pin-based on-the-fly multi-core cache simulator." Aamer Jaleel, Robert S. Cohn, Chi-Keung Luk, and Bruce Jacob. Proc. Fourth Annual Workshop on Modeling, Benchmarking and Simulation (MoBS), pp. 28-36. Beijing China, June 2008.

  • Memory Systems: Cache, DRAM, Disk. Bruce Jacob, Spencer W. Ng, and David T. Wang, with contributions by Samuel Rodriguez. ISBN 978-0-12-379751-3. Morgan Kaufmann Publishers, September 2007. Approx. 1000 pages, 500,000 words.

    book-cover.jpg

  • "Fully-Buffered DIMM memory architectures: Understanding mechanisms, overheads and scaling." Brinda Ganesh, Aamer Jaleel, David Wang, and Bruce Jacob. Proc. 13th International Symposium on High Performance Computer Architecture (HPCA 2007). Phoenix AZ, February 2007.

  • "Modeling heterogeneous SoCs with SystemC: A digital/MEMS case study." A. Varma, Y. Afridi, A. Akturk, P. Klein, A. Hefner, and B. Jacob. Proc. International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES 2006), pp. 54-64. Seoul Korea, October 2006.

  • "Energy/power breakdown of pipelined nanometer caches (90nm/65nm/45nm/32nm)." Samuel V. Rodriguez and Bruce Jacob. Proc. International Symposium on Low Power Electronics and Design (ISLPED 2006), pp. 25-30. Tegernsee Germany, October 2006.

  • "In-line interrupt handling and lock-up free translation lookaside buffers (TLBs)." Aamer Jaleel and Bruce Jacob. IEEE Transactions on Computers, vol. 55, no. 5, pp. 559-574. May 2006.

  • "Last-level cache (LLC) performance of data-mining workloads on a CMP--A case study of parallel bioinformatics workloads." Aamer Jaleel, Matthew Mattina, and Bruce Jacob. Proc. 12th International Symposium on High Performance Computer Architecture (HPCA 2006), Austin TX, February 2006.

  • "Electromagnetic interference and digital circuits: An initial study of clock networks." Hongxia Wang, Samuel V. Rodriguez, Cagdas Dirik, and Bruce Jacob. Electromagnetics, vol. 26, no. 1, pp. 73-86. January 2006. (Special Issue: RF effects on Digital Systems)

  • "DRAMsim: A memory-system simulator." David Wang, Brinda Ganesh, Nuengwong Tuaycharoen, Katie Baynes, Aamer Jaleel, and Bruce Jacob. SIGARCH Computer Architecture News, vol. 33, no. 4, pp. 100-107. September 2005.

  • "BioBench: A benchmark suite of bioinformatics applications." Kursad Albayraktaroglu, Aamer Jaleel, Xue Wu, Manoj Franklin, Bruce Jacob, Chau-Wen Tseng, and Donald Yeung. Proc. 2005 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2005), pp. 2-9. Austin TX, March 2005.

  • "Using Virtual Load/Store Queues (VLSQs) to reduce the negative effects of reordered memory instructions." Aamer Jaleel and Bruce Jacob. Proc. 11th International Symposium on High Performance Computer Architecture (HPCA 2005), pp. 191-200. San Francisco CA, February 2005.

  • "TERPS: The Embedded Reliable Processing System." Hongxia Wang, Samuel Rodriguez, Cagdas Dirik, Amol Gole, Vincent Chan, and Bruce Jacob. A finalist in the University LSI Design Contest. Proc. Asia and South Pacific Design Automation Conference 2005 (ASP-DAC 2005), Shanghai China, January 2005.

  • "Instruction-level power dissipation in the Intel XScale embedded microprocessor." A. Varma, E. Debes, I. Kozintsev, and B. Jacob. Proc. SPIE's 17th Annual Symposium on Electronic Imaging Science & Technology, San Jose CA, January 2005.

  • "Performance characteristics of MAUI: an intelligent memory system architecture." Justin Teller, Charles Silio, and Bruce Jacob. Proc. 2005 Workshop on Memory System Performance (MSP 2005), pp. 44-53. Chicago IL, June 2005.

  • "Extended Split-Issue: Enabling flexibility in the hardware implementation of NUAL VLIW DSPs." Bharath Iyer, Sadagopan Srinivasan, and Bruce Jacob. Proc. 31st International Symposium on Computer Architecture (ISCA'04), pp. 364-375. Munchen Germany, June 2004.

  • "The performance and energy consumption of embedded real-time operating systems." K. Baynes, C. Collins, E. Fiterman, B. Ganesh, P. Kohout, C. Smit, T. Zhang, and B. Jacob. IEEE Transactions on Computers, vol. 52, no. 11, pp. 1454-1469. November 2003.

  • "A control-theoretic approach to dynamic voltage scheduling." A. Varma, B. Ganesh, M. Sen, S. R. Choudhary, L. Srinivasan, and B. Jacob. Proc. International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES 2003), pp. 255-266. San Jose CA, October 2003.

  • "Hardware support for real-time operating systems." Paul Kohout, Brinda Ganesh, and Bruce Jacob. Proc. First IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS 2003), pp. 45-51. Newport Beach CA, October 2003.

  • "A case for studying DRAM issues at the system level." Bruce Jacob. IEEE Micro, vol. 23, no. 4, July/August 2003.

  • "Transparent data-memory organizations for digital signal processors." Sadagopan Srinivasan, Vinodh Cuppu, and Bruce Jacob. Proc. International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES 2001), pp. 44-48. Atlanta GA, November 2001.

  • "The performance and energy consumption of three embedded real-time operating systems." K. Baynes, C. Collins, E. Fiterman, B. Ganesh, P. Kohout, C. Smit, T. Zhang, and B. Jacob. Proc. International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES 2001), pp. 203-210. Atlanta GA, November 2001.

  • "High performance DRAMs in workstation environments." Vinodh Cuppu, Bruce Jacob, Brian Davis, and Trevor Mudge. IEEE Transactions on Computers, vol. 50, no. 11, pp. 1133-1153. November 2001. (TC Special Issue on High-Performance Memory Systems)

  • "In-line interrupt handling for software-managed TLBs." Aamer Jaleel and Bruce Jacob. Proc. 19th IEEE International Conference on Computer Design (ICCD-19), pp 62-67. Austin TX, September 2001.

  • "Concurrency, latency, or system overhead: Which has the largest impact on uniprocessor DRAM-system performance?" Vinodh Cuppu and Bruce Jacob. Proc. 28th International Symposium on Computer Architecture (ISCA'01), pp. 62-71. Goteborg Sweden, June 2001.

  • "Uniprocessor virtual memory without TLBs." Bruce Jacob and Trevor Mudge. IEEE Transactions on Computers, vol. 50, no. 5, pp. 482-499. May 2001.

  • "DDR2 and low-latency variants." Brian Davis, Trevor Mudge, Bruce Jacob, and Vinodh Cuppu. Proc. Memory Wall Workshop, held in conjunction with the 27th International Symposium on Computer Architecture (ISCA'00). Vancouver BC, Canada, June 2000.

  • "A performance comparison of contemporary DRAM architectures." Vinodh Cuppu, Bruce Jacob, Brian Davis, and Trevor Mudge. Proc. 26th International Symposium on Computer Architecture (ISCA'99), pp. 222-233. Atlanta GA, May 1999.

  • "Hardware/software architectures for real-time caching." Bruce L Jacob. Proc. Second Workshop on Compiler and Architecture Support for Embedded Systems (CASES'99), pp. 135-138, Washington DC, October 1999.

  • "Hardware/software co-design of I/O interfacing hardware and real-time device drivers for embedded systems." David B Stewart and Bruce L Jacob. Proc. Second Workshop on Compiler and Architecture Support for Embedded Systems (CASES'99), Washington DC, October 1999.

  • "A look at several memory management units, TLB-refill mechanisms, and page table organizations." Bruce L Jacob and Trevor N Mudge. Proc. Eighth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS'98), pp. 295-306. San Jose CA, October 1998.

  • "Virtual memory in contemporary microprocessors." Bruce L Jacob and Trevor N Mudge. IEEE Micro, vol. 18, no. 4, pp. 60-75. July/August 1998.

  • "Virtual memory: Issues of implementation." Bruce L Jacob and Trevor N Mudge. IEEE Computer, vol. 31, no. 6, pp. 33-43. June 1998.

  • "Software-managed caches: Architectural support for real-time embedded systems." Bruce L Jacob. CASES'98: Workshop on Compiler and Architecture Support for Embedded Systems. Washington DC, December 1998.
    The slides for the talk are available on-line in PDF format, and include many details not found in the 2-page abstract.

  • "Software-managed address translation." Bruce L Jacob and Trevor N Mudge. Proc. Third International Symposium on High Performance Computer Architecture (HPCA'97), pp. 156-167, San Antonio TX, February 1997.

  • "An analytical model for designing memory hierarchies." Bruce L Jacob, Peter M Chen, Seth R Silverman, and Trevor N Mudge. IEEE Transactions on Computers, vol. 45, no. 10, pp. 1180-1194. October 1996.

    Computer Architecture: Chapters in Books

    Computer Architecture: Position Papers, etc.


    Embedded Systems: Refereed Conferences & Journals

    Embedded Systems: Chapters in Books

    Embedded Systems: Position Papers, etc.


    Circuit Integrity: Refereed Conferences & Journals


    Genetic Algorithms and Electronic Music Composition: Refereed Conferences & Journals


    Distributed Systems: Position Papers, etc.


    Student Theses