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 Rajeev  Barua

Associate Professor

Description: Home

Description: Curriculum Vitae

Description: Publications

Description: Contact Info

Send Email:
barua@eng.umd.edu

ECE
UMIACS
ISR
UMCP

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Description: Publications

Refereed Journals:

         Implementation and Performance Evaluation of a Distributed Conjugate Gradient Method in a Cloud Computing Environment. Leila Fayez and Rajeev Barua. In the Journal on Software: Practice and Experience (SPE), John Wiley and Sons, Ltd. February, 2012. doi: 10.1002/spe.2112.

         MemSafe: Ensuring the Spatial and Temporal Memory Safety of C at Runtime. Matthew Simpson and Rajeev Barua. In the Journal on Software: Practice and Experience (SPE), John Wiley and Sons, February 2012. doi: 10.1002/spe.2105

         Resource-Aware Compiler Prefetching for Fine-Grained Many-Cores. George Caragea, Alexandros Tzannes, Fuat Keceli, Rajeev Barua and Uzi Vishkin. In the International Journal of Parallel Programming (IJPP), 39(5), pp 615-638, Springer Netherlands, ISSN: 0885-7458, February 28, 2011.

         Memory Allocation for Embedded Systems with a Compile-Time-Unknown Scratch-Pad Size.
Nghi Nguyen, Angel Dominguez, and Rajeev Barua.
In ACM Transactions on Embedded Computing Systems (TECS), 8(3), pp 1-32, April 2009
.

         MTSS: Multi Task Stack Sharing for Embedded Systems
Bhuvan Middha, Matthew Simpson and Rajeev Barua
In ACM Transactions on Embedded Computing Systems (TECS), 7(4), Article 46, pp 1-37, July 2008.

R. Barua, W. Lee, S. Amarasinghe and A. Agarwal.
IEEE Transactions on Computers, Special Issue on Memory Systems, Nov 2001.

  • Baring it all to the software. 
    by Elliot Waingold, Michael Taylor, Vivek Sarkar, Walter Lee, Victor Lee, Jang Kim, Matthew Frank, Peter Finch, Srikrishna Devabhaktuni, Rajeev Barua, Jonathan Babb, Saman Amarasinghe, and Anant Agarwal 
    IEEE Computer, September 1997, pp. 86-93. 

Refereed Conferences: 

         Retrofitting Security in COTS Software with Binary Rewriting. by Padraig O'Sullivan, Kapil Anand, Aparna Kotha, Matthew Smithson, Rajeev Barua and Angelos D. Keromytis. Proceedings of the 26th IFIP International Information Security Conference (IFIP SEC). June 7-9, 2011, Lucerne, Switzerland. (12 pages)

         Toolchain for Programming, Simulating and Studying the XMT Many-Core Architecture. by Fuat Keceli, Alexandros Tzannes, George C. Caragea, Rajeev Barua, Uzi Vishkin. Proceedings of the 16th International Workshop on High-Level Parallel Programming Models and Supportive Environments (HIPS), May 20, 2011. Anchorage, Alaska. (10 pages)

         Automatic parallelization in a binary rewriter. by Aparna Kotha, Kapil Anand, Matthew Smithson, Greeshma Yellareddy, and Rajeev Barua. Proceedings of the 43rd International ACM/IEEE symposium on Microarchitecture (MICRO). December 4-8, 2010, Atlanta, Georgia. (11 pages)

         MemSafe: Ensuring the Spatial and Temporal Memory Safety of C at Runtime. by Matthew Simpson and Rajeev Barua. Proceedings of the 10th IEEE Working Conference on Source Code Analysis and Manipulation (SCAM). September 1213, 2010. Timişoara, Romania. (10 pages)

         Resource-Aware Compiler Prefetching for Many-Cores. by George Caragea, Alexandros Tzannes, Rajeev Barua and Uzi Vishkin. Proceedings of the Ninth International Symposium on Parallel and Distributed Computing (ISPDC). July7-9, 2010. Istanbul, Turkey (8 pages)

         Lazy Binary-Splitting: A Run-Time Adaptive Dynamic Parallel Scheduler. by Alexandros Tzannes, George Caragea, Uzi Vishkin and Rajeev Barua. Proceedings of the 15th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming (PPoPP). January 914, 2010, Bangalore, India (11 pages)

         Instruction Cache Locking inside a Binary Rewriter. by Kapil Anand and Rajeev Barua. Proceedings of the ACM International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), Grenoble, France, October 11-16, 2009. (10 pages)

         Scratch-Pad Memory Allocation without Compiler Supports for Java Applications
By Nghi Nguyen, Angel Dominguez and Rajeev Barua.
In Proceedings of the ACM International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), Salzburg, Austria, October 1-3, 2007. (10 pages)

         Recursive Function Allocation to Scratch-Pad Memory for Embedded Systems
By Angel Dominguez, Nghi Nguyen and Rajeev Barua.
In Proceedings of the ACM International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), Salzburg, Austria, October 1-3, 2007. (10 pages)

by Zhang Yi, Steve Haga and Rajeev Barua.
Proceedings of the Sixteenth ACM Int'l Conference on Supercomputing (ICS), New York City, NY, June, 2002.

by T.V.K Gupta, Roberto Ko and Rajeev Barua.
Proceedings of Tenth ACM/IEEE Int'l Symposium on Hardware/Software Codesign (CODES), Estes Park, CO, May, 2002.

O. Avissar, R. Barua and D. Stewart.
Proceedings of the ACM 2nd Int'l Conf. on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), Atlanta, GA, November 2001.

by Rajeev Barua, Walter Lee, Saman Amarasinghe and Anant Agarwal
Proceedings of the Twenty-Sixth International Symposium on Computer Architecture (ISCA), Atlanta, GA, June, 1999. pp 4-15.

by Rajeev Barua, Walter Lee, Saman Amarasinghe and Anant Agarwal
Proceedings of the ACM/IEEE Fifth International Conference on High-Performance Computing (HiPC), December, 1998. pp 212-220.

by W. Lee, R. Barua, D. Srikrishna, J. Babb, V. Sarkar, and S. Amarasinghe
Proceedings of the Eighth International Conference on Architectural Support for Programming Languages and Operating Systems(ASPLOS), San Jose, CA, October, 1998. pp 46-57.

by Jonathan Babb, Martin Rinard, Andras Moritz, Walter Lee, Matthew Frank, Rajeev Barua, and Saman Amarasinghe 
Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines '99 (FCCM '99), Napa Valley,                   CA, April 1999, pp 70-80.

by Anant Agarwal, Saman Amarasinghe, Rajeev Barua, Matthew Frank, Walter Lee, Vivek Sarkar, Devabhaktuni Srikrishna and Michael Taylor. 
Proceedings of the Second SUIF compiler workshop, Stanford, CA, August 21-23, 1997. 

by Jonathan Babb, Matthew Frank, Elliot Waingold, Rajeev Barua, Michael Taylor, Jang Kim, Srikrishna Devabhaktuni, Peter Finch, and Anant Agarwal 
Proceedings of the  IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM) , Napa Valley, CA, April 1997, pp 134-144.

by Frederic T. Chong, Rajeev Barua, Fredrik Dahlgren, John D. Kubiatowitz, and Anant Agarwal
Proceedings of 4th Int'l Symposium on High Performance Computer Architecture (HPCA), Las Vegas, NV, Feb 1-4, 1998. 

by Rajeev Barua, David Kranz and Anant Agarwal
Proceedings of Symposium on Languages and Compilers for Parallel Computing (LCPC), August 1996. Springer Verlag, Berlin, Germany.

Refereed Workshops: 

by Steve Haga and Rajeev Barua.
1st Annual Workshop on Explicitly Parallel Instruction Computing Architectures and Compiler Technology (EPIC), Austin, TX, December, 2001.

Other Publications: 

 


Rajeev Barua, David Kranz and Anant Agarwal
Proceedings of the MIT Student Workshop, Wellesley, MA, July 1995. 
( two-page workshop version

Book Chapters:
 

  • Optimal Tiling for Minimizing Communication in Distributed Shared-Memory Multiprocessors.

by Anant Agarwal, David Kranz, Rajeev Barua and Venkat Natarajan
Chapter 9, Compiler Optimizations for Scalable Parallel Systems -- Languages, Compilation Techniques and Runtime Systems, LNCS Series 1808, Springer-Verlag, Berlin, Germany, 2001.

  • Dynamic Functional Unit Assignment for Low Power. 
    By
    S. Haga, N. Reeves and R. Barua
    In Embedded Software for SoCs, Kluwer Academic Publishers, Dordrecht, The Netherlands, 2003.


My Theses:

by Rajeev Barua, Ph.D thesis, MIT Laboratory for Computer Science, Jan 2000.  Available as Technical Report MIT-LCS-TR-799.

by Rajeev Barua
Masters Thesis, MIT Laboratory for Computer Science, May 1994. MIT-LCS-TR-630. 
Also appears in MIT student workshop, Cape Cod, July 1994. 
( two-page workshop version

Selected student theses:  (This is a VERY IMCOMPLETE LIST!!)

by Angel Dominguez, Ph.D thesis, University of Maryland, Department of Electrical and Computer Engineering, Feb 2007.
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