PUBLICATIONS

Book chapters

  1. V. Khandelwal and A. Srivastava, “Basic Algorithmic Techniques”, To Appear in C. Alpert, D. Mehta and S. Sapatnekar Edited Handbook of Physical Design Automation

 

  1. A. Srivastava, J. Sobaje, M. Potkonjak and M. Sarrafzadeh, "Optimal Node Scheduling for Effective Energy Usage in Sensor Networks", System level Power Optimization for Wireless Multimedia Communication, Kulwer Academic Publishers, 2002.

Articles in refereed journals

  1. M. Peckerar, D. Sander, A. Srivastava, A. Foli and U. Vishkin, “Electron Beam and Optical Proximity Effect Reduction for Nanolithography: New Results”, To Appear in Journal on Vacuum Science and Technology B.

 

  1. A. Davoodi and A. Srivastava, “Variability-Driven Gate Sizing for Binning Yield Optimization”, IEEE Transactions on VLSI Systems (TVLSI08), Vol 16, No 6, pp. 683-692, June 2008

 

  1. A. Sankaranarayanan, A. Srivastava and R. Chellappa “Algorithmic and Architectural Optimizations for Computationally Efficient Particle Filtering”, IEEE Transactions on Image Processing, (TIP), Vol 17, No5, pp. 737-748, May 2008

 

  1. V. Khandelwal and A. Srivastava, “Variability-Driven Formulation for Simultaneous Gate Sizing and Post-Silicon Tunability Allocation,”, IEEE Transactions on Computer Aided Design (TCAD07), Vol 27, No 4, pp. 610-620, April 2008

 

  1. V. Khandelwal and A. Srivastava, “Active Mode Leakage Reduction Using Fine-Grained Forward Body Biasing Strategy”, Integration the VLSI Journal  (Integration), Vol. 40, No. 4, pp. 561-570, July 2007.

 

  1. V. Khandelwal and A. Srivastava, “Leakage Control Through Fine-Grained Placement and Sizing of Sleep Transistors”, IEEE Transactions on Computer Aided Design (TCAD07), Vol 26, No 7, pp. 1246-1255, July 2007

 

  1. V. Khandelwal and A. Srivastava, “A Quadratic Modeling-Based  Framework for Accurate Statistical Timing Analysis Considering Correlation”, IEEE Transactions on VLSI Systems (TVLSI07), Vol 15, No. 2, pp. 206-215, February 2007

 

  1. A. Davoodi, V. Khandelwal, A. Srivastava, "Probabilistic Evaluation of Solutions in Variability-Driven Optimization", IEEE Transactions on Computer Aided Design (TCAD06), Vol 25, No 12, pp. 3010-3016, December 2006.

 

  1. J. L. Wong, A. Davoodi, V. Khandelwal, A. Srivastava, M. Potkonjak, "A Statistical Methodology for Wire-length Prediction”, IEEE Transactions on Computer Aided Design (TCAD'06),  Vol. 25, No. 7, pp. 1327-1336, July 2006

 

  1. A. Davoodi, A. Srivastava, "Effective Techniques for the Generalized Low Power Binding Problem",  ACM Transactions on Design Automation of Electronic Systems, (TODAES'06), Vol. 11, No. 1, pp. 52-69, January 2006

 

  1. A. Davoodi and A. Srivastava, "Power-Driven Simultaneous Resource Binding and Floorplanning: A Probabilistic Approach", IEEE Transactions on VLSI Systems (TVLSI'05), Vol. 13, No. 8, pp. 934-942, August 2005

 

  1. V. Khandelwal, A. Davoodi, A. Srivastava, "Simultaneous Vt Selection and Assignment for Leakage Optimization", IEEE Transactions on VLSI Systems (TVLSI'05), Vol. 13, No. 6, pp. 762-765, June 2005

 

  1. A. Davoodi and A. Srivastava: “Voltage Scheduling Under Uncertainties: A Risk Management Perspective”, ACM Transactions on Design Automation of Electronic Systems (TODAES'05), Vol. 10, No. 2, pp.354-368, April 2005

 

  1. A. Srivastava, S. Ogrenci Memik, B. Kyung Choi and M. Sarrafzadeh, “On Effective Slack Management in the Post Scheduling Phase”, IEEE Transactions on Computer Aided Design (TCAD’05), Vol. 24, No. 4, pp. 645-653, April 2005.

 

  1. A. Davoodi, V. Khandelwal and A. Srivastava, “Empirical Model for Net Length Probability Distribution and Applications”, IEEE Transactions. on  VLSI Systems (TVLSI’04), Vol. 12, No. 10, pp. 1066-1075, October 2004

 

  1. A. Srivastava, R. Kastner, C. Chen and ,M. Sarrafzadeh, “Timing Driven Gate Duplication”, IEEE Transactions on VLSI Systems (TVLSI’04) Vol 12, No 1, pp. 42-51, January 2004

 

  1. C. Chen, E. Bozorgzadeh, A. Srivastava and M. Sarrafzadeh, “Budget Management and its Applications”, ALGORITHMICA, Vol 34, pages 261-275, 2002

 

  1. A. Srivastava E. Kursun and M. Sarrafzadeh, “Predictability in RT-Level Designs”, Journal of Circuits, Systems and Computers, Special Issue on Low Power IC Designs. (JCSC’02) ,  Vol  11 No  4,  pp. 323 – 332, August 2002

 

  1. S. Ghiasihafezi, A. Srivastava, X. Yang and M. Sarrafzadeh, “Optimal Energy Aware Clustering in Sensor Networks ”, SENSORS Journal, Vol 2, No. 7, pp. 258-269, July 2002

 

  1. A. Srivastava, C. Chen and Majid Sarrafzadeh, “Timing Driven Gate Duplication in the Technology Independent Stage”, IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences (IEICE’01), vol. E84-A, pp. 2673-2680, November 2001.

 

  1. C.Chen, A. Srivastava and M. Sarrafzadeh, “On Gate-Level Power Optimization Using Dual Supply Voltages”, IEEE Transactions on VLSI Systems (TVLSI’01), Vol. 9, No 5, pp. 616-629, October 2001.

 

  1. A. Srivastava, R. Kastner and M. Sarrafzadeh, “On the Complexity of Gate Duplication”, IEEE Transactions on Computer Aided Design (TCAD’01), Vol. 20, No. 9, pp. 1170-1176, September. 2001.

 

  1. A.H. Farrahi, C. Chen, A. Srivastava, M. Sarrafzadeh and G. Tellez, “Activity Driven Clock Design”, IEEE Transactions on Computer Aided Design (TCAD01), Vol. 20, No. 6, pp. 705-714, June 2001.

Refereed conference and workshop papers

  1. V. Khandelwal and A. Srivastava, “Monte Carlo Driven Stochastic Optimization Framework for Handling Fabrication Variability”, Proc. International Conference on Computer Aided Design (ICCAD07), November 2007

 

  1. J. Wong, A. Davoodi, V. Khandelwal, A. Srivastava and M. Potkonjak, “Statistical Timing Analysis Using Kernel Smoothing”, Proc. International Conference on Computer Design (ICCD07), October 2007

 

  1. V. Khandelwal and A. Srivastava, “Variability-Driven Formulation for Simultaneous Gate Sizing and Post-Silicon Tunability Allocation”, Proc. International Symposium on Physical Design (ISPD07) April 2007. WINNER BEST PAPER AWARD.

 

  1. A. Dobhal, V. Khandelwal and A. Srivastava, "Efficient and Accurate Statistical Timing Analysis for Non-linear, Non-Gaussian Variability with Incremental Attributes", Proc International Conference on VLSI Design January 2007

 

  1. A. Dobhal, V. Khandelwal, A. Davoodi and A. Srivastava, "Variability Driven Joint Leakage, Delay Optimization With Provable Convergence", Proc. International Conference on VLSI Design January 2007

 

  1. A. Davoodi and A. Srivastava, “Variability-Driven Gate Sizing for Binning Yield Optimization”, Proc. Design Automation Conference (DAC06) July 2006

 

  1. A. Davoodi and A. Srivastava, "Variability Driven Gate Sizing for Binning Yield Optimization ", Proc. International Workshop on Logic and Synthesis (IWLS'06), June 2006

 

  1. V. Khandelwal and A. Srivastava, “Stochastic Programming Based Optimization Framework in Presence of Variability”, ", Proc. International Workshop on Logic and Synthesis (IWLS'06), June 2006

 

  1. A. Dobhal, V. Khandelwal and A. Srivastava, “Efficient and Accurate Statistical Timing Analysis for Non-Linear, Non-Gaussian Variability With Incremental Attributes”, Proc. International Workshop on Logic and Synthesis (IWLS'06), June 2006

 

  1. A. Davoodi and A. Srivastava, “Probabilistic Evaluation of Solutions in Variability-Driven Optimization”, Proc. International Symposium on Physical Design (ISPD'06) , April 2006

                               

  1. A. Davoodi and A. Srivastava, “Variability-Driven Buffer Insertion Considering Correlations”, Proc. of International Conference on Computer Design (ICCD'05)  October 2005 

 

  1. A. Sankaranarayanan, R. Chellappa and A. Srivastava, “Algorithmic and Architectural Design Methodology for Particle Filters in Hardware”, Proc. of International Conference on Computer Design (ICCD'05)  October 2005 

 

  1. A. Davoodi and A. Srivastava, “Probabilistic Dual-Vth Leakage Optimization Under Variability ”, International Symposium on Low Power Electronics and Design  (ISLPED’05) August 2005

 

  1. V.  Khandelwal and A. Srivastava, “A General Framework for Accurate Statistical Timing Analysis Considering Correlations”, Proc. Design Automation Conference, (DAC’05) June 2005

 

  1. A. Davoodi and A. Srivastava, "Variability Driven Buffer Insertion Considering Correlations ", Proc. International Workshop on Logic and Synthesis (IWLS'05), June 2005

 

  1. A. Davoodi and A. Srivastava, "Efficient Stochastic Pruning for Variability-Driven Dual-Vth Leakage Optimization", Proc. International Workshop on Logic and Synthesis (IWLS'05), June 2005  

 

  1. V. Khandelwal and A. Srivastava, “A General Framework for Accurate Statistical Timing Analysis Considering Correlations”, Proc. International Workshop on Logic and Synthesis (IWLS'05), June 2005

 

  1. L. Yuan, G Qu and A. Srivastava, “VLSICAD Tool Protection by Birthmarking Design Solutions”, Proc. Great Lakes Symposium on VLSI (GLSVLSI’05) April 2005

 

  1. A. Davoodi and A. Srivastava, "Wake-up Protocols for Controlling Current Surges in MTCMOS-based Technology", Proc. Asia South Pacific Design Automation Conference (ASP-DAC’05),  January 2005

 

  1. A. Davoodi and A. Srivastava, "Simultaneous Floorplanning and Binding: A Probabilistic Approach", Proc. Asia South Pacific Design Automation Conference (ASP-DAC’05),  January 2005

 

21.   V. Khandelwal, A. Davoodi and A. Srivastava, "Efficient Statistical Timing Analysis through Error Budgeting", Proc. IEEE/ACM International Conference on Computer Aided Design ( ICCAD’04), November 2004

 

22.   V. Khandelwal and A. Srivastava, "Leakage Control Through Fine-Grained Placement and Sizing of Sleep Transistors", Proc. IEEE/ACM International Conference on Computer Aided Design ( ICCAD’04), November 2004

 

23.   J. Wong, A. Davoodi, V. Khandelwal, A. Srivastava and M. Potkonjak, "Wire-length Prediction using Statistical Techniques",  Proc. IEEE/ACM International Conference on Computer Aided Design ( ICCAD’04), November 2004

 

24.   A. Davoodi, V. Khandelwal and A. Srivastava, "Variability Inspired Implementation Selection Problem", Proc. IEEE/ACM International Conference on Computer Aided Design ( ICCAD’04), November 2004

 

  1. V. Khandelwal and A. Srivastava, "Active Mode Leakage Reduction Using Fine-Grained Forward Body Biasing Strategy ", Proc.International Symposium on Low Power Electronics and Design (ISLPED’04) August 2004.

 

26.   V. Khandelwal and A. Srivastava, "On Placement and Sizing of Sleep Transistors in Leakage Critical Circuits", Proc. International Workshop on Logic Synthesis (IWLS’04) June 2004

 

27.   A. Davoodi and A. Srivastava, "Simultaneous Floorplanning and Binding: A Probabilistic Approach", Proc. International Workshop on Logic and Synthesis (IWLS’04), June 2004

 

  1. A. Davoodi, V. Khandelwal and A. Srivastava, "High Level Techniques for Power-Grid Noise Immunity ", Proc. Great Lakes Symposium on VLSI (GLSVLSI'04) , April 2004

 

  1. A. Srivastava et al: “Achieving Design Closure Through Delay Relaxation Parameter”, Proc. IEEE/ACM International Conference on Computer Aided Design ( ICCAD’03), November 2003

 

  1. V. Khandelwal, A. Davoodi, A. Nanavati and A. Srivastava, “A Probabilistic Approach to Buffer Insertion" Proc. IEEE/ACM International Conference on Computer Aided Design ( ICCAD’03), November 2003 BEST PAPER AWARD NOMINEE.

 

  1. A. Davoodi and A. Srivastava, “Effective Graph Theoretic techniques for the Generalized Low Power Binding Problem”, Proc. International Symposium on Low Power Design (ISLPED’03) August 2003

 

  1. A. Davoodi and A. Srivastava, “Voltage Scheduling Under Uncertainties: A Risk Management Perspective”,  Proc. International Symposium on Low Power Design (ISLPED’03) August 2003

 

  1. A. Srivastava, “Simultaneous Vt Selection and Assignment for Leakage Optimization”, Proc. International Symposium on Low Power Design (ISLPED’03) August 2003

 

  1. A. Srivastava and M. Sarrafzadeh, "Predictability: Definition Analysis and Optimization", Proc. International Conference on Computer Aided Design (ICCAD’02) November. 2002

 

  1. E. Kursun, A. Srivastava, S. Ogrenci Memik and M. Sarrafzadeh, "Early Evaluation techniques for Low Power Binding", Proc. International Symposium on Low Power Design  (ISLPED’02) August. 2002

 

  1. A. Srivastava, J. Sobaje, M. Potkonjak and M. Sarrafzadeh, "Optimal Node Scheduling for Effective Energy Usage in Sensor Networks", Proc. IEEE Workshop on Integrated Management of Power Aware Communications, Computing and Networking, May 2002

 

  1. S. Ogrenci-Memik, A. Srivastava and M. Sarrafzadeh, "Algorithmic Aspects of Uncertainty Driven Scheduling", Proc. IEEE International Symposium on Circuits and Systems (ISCAS’02) May. 2002.

 

  1. A. Srivastava, C. Chen and M. Sarrafzadeh, "Exact Algorithm for Modifying Buffer Trees using Buffer Duplication in a Delay Optimization Perspective" ,Proc. International Workshop on Logic Synthesis, (IWLS’01) June 2001

 

  1. M. Sarrafzadeh, E. Bozorgzadeh, R. Kastner and A. Srivastava, "Design and Analysis of Physical Design Algorithms", Proc. International Symposium on Physical Design (ISPD’01) April 2001

 

  1. A. Ranjan, A. Srivastava and M. Sarrafzadeh, "Layout Aware Retiming", Proc. Great Lakes Symposium on VLSI (GLSVLSI’01), March 2001.

 

  1. R. Murgai, S. Chakraborthy, R. Carragher, M. Prasad, A. Srivastava, N. Vemuri and H. Yoshidd, "Layout Driven Logic Optimization",, Proc. Design Automation and Test in Europe (DATE’01) February 2001.

 

  1. A. Srivastava, C. Chen and M. Sarrafzadeh, "Timing Driven Gate Duplication in the Technology Independent Stage", Proc. Asia and South Pacific Design Automation Conference, (ASPDAC’01) January 2001

 

  1. A.Srivastava, R. Kastner and M. Sarrafzadeh, "Timing Driven Gate Duplication: Complexity Issues and Algorithms", Proc. International Conference on Computer Aided Design (ICCAD’00) November. 2000

 

  1. A.Srivastava, R. Kastner and M. Sarrafzadeh, “On The Complexity of Gate Duplication”, Proc. International Workshop on Logic Synthesis (IWLS’00) June 2000