Adaptable Intelligent Nanoscale Electronic Systems Lab
Dr Ankur Srivastava, Associate Professor
With improvements in fabrication technology, more than a billion transistors are available for designers. This calls for innovative and revolutionary design approaches that unlock applications unfathomable a few years ago. Novel and exciting directions of research are being pursued to improve the performance of current computer systems by three orders of magnitude in just a few years. Supporting a billion transistors along with such grand performance expectations is a contemporary mega-challenge with problems such as power, temperature, reliability, performance, process variations, manufacturability and others acting as major obstacles in way of optimal utilization of the transistor resource. The death of clock frequency scaling in modern CPUs and the advent of multi-core processors has enabled the era of improving application awareness, especially if one has to exploit the hidden parallelism. Addressing these challenges and opportunities calls for developing a unique design methodology and runtime management approach in a unified way. At design time, one has virtually unrestrained capability to control the implementation but the exact parameters post fabrication and operational behavior during runtime can only be guessed. This is particularly true in modern deca-nanometer fabrication technologies which on one side provide unprecedented capability to fit almost a billion transistors on chip, and on the other side are accompanied by significant randomness associated with fabricated transistor parameters. Such densely packed devices are also susceptible to significant operation randomness during runtime caused due to unpredictable thermal hotspots, soft errors etc. Also, maximum performance and power efficiency can only be obtained by exploiting specific computational structure in the applications and tailoring the hardware and software architecture dynamically at runtime for delivering maximal performance, how so ever it is defined. The issue of security provides another dimension to this riddle. A pure design approach cannot address these challenges effectively and a unified pre and post approach is needed that balances the design and runtime efforts. A central theme of our research group is developing the notion of autonomous adaptability that allows the systems to learn from the environment and customize their capabilities (either hardware or software) for providing seamless service at minimal cost (such as power dissipation). Please feel free to scan this webpage for detailed information about the specific research projects we are pursuing.
Education is a key objective of this group and we strive to train the next generation of academicians and industry professionals that will push the frontiers of technology in whatever they choose to do.