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Vishkin, Barua and Ghanim Introduce ICE to Eliminate Programmer’s Multi-Threading – A Productivity-Buster in Parallel Computing

Vishkin, Barua and Ghanim Introduce ICE to Eliminate Programmer’s Multi-Threading – A Productivity-Buster in Parallel Computing

Since 2005, all mainstream commercial computers have been using multi-core processors that rely on parallel computing: a paradigm that allows a computer to perform many different tasks simultaneously. The programming of multi-core processor machines to operate in parallel is done through partitioning the task at hand to mostly self-controlling subtasks, called threads, whose operation the programmer is expected to orchestrate--a difficult and costly undertaking. However, during the prior decade, Prof. Uzi Vishkin (ECE/UMIACS) introduced XMT: Explicit Multi-Threading,  a computer system which builds on PRAM: Parallel Random Access Machines, the foremost parallel algorithmic theory to date. XMT functions to make programming simpler for software developers as it allows much shorter threads, greatly reducing the variance among subtasks, in spite of the fact that the hardware “under the hood” is multi-threaded. The technology has been utilized in quite a few settings, and the most telling has been its use for programming a simulator of the XMT many-core computer by over 600 students over the course of 8 years at Thomas Jefferson High School for Science and Technology in Alexandria, VA.

Performance programming of standard computers relies on C language, and XMT performance programming is done using an extension of C called XMTC. While driven by the lock-step, synchronous theory of parallel algorithms, the responsibility of XMT multithreaded programming still shared some of the challenges of orchestrating subtasks. Therefore, Prof. Vishkin and colleagues Prof. Rajeev Barua (ECE/ISR) and PhD student Fady Ghanim (ECE) have presented a new lock-step parallel programming language known as ICE, Intermediate Concurrent Execution, which enables tightly-synchronous threading-free programming for multi-threaded execution. Per their new joint paper, published in the IEEE Transactions on Parallel and Distributed Systems titled “Easy PRAM-Based High Performance Parallel Programming with ICE,” the ICE arrangement provides comparable performance to highly-optimized XMTC programs while requiring much less effort from the programmer and a reduction in lines of code needed; in fact, the textbook description of parallel algorithms is typically all that is needed for producing an ICE program. 

 “Regimenting divergent subtasks required by multi-threaded programming often amounts to herding cats” says Prof. Vishkin. “In contrast, regimenting ICE is no more than a variant of serial programming—the programming framework that brought about the prevalence of computing technology in today’s economy and science.”

The conclusion of this work is potentially far-reaching. During the 5-6 decades during which serial computing dominated, general-purpose processors have been the quintessential form of computing. The transition to parallel computing around 2005 has brought about a divergent reality where computing performance has been mostly delegated to accelerators, such as GPUs and FPGAs among many others, with many betting that general-purpose computing is already beyond its diminishing returns point. The new work suggests that there is potential for still using general-purpose computers, as the backbone platform for computing. 

Related Articles:
Vishkin’s Supercomputer Enables Ph.D.-Level Parallel Programming in High School
TEDCO Invests $1M into Innovative Companies Including Rajeev Barua’s Startup SecondWrite LLC
Vishkin Offers Fresh Perspective on Commodity Computing in ACM Viewpoint
Alex Tzannes wins ACM Student Research Competition

October 24, 2017

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