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1. (9 points) Answer each of the following in 5-6 sentences. a. Explain why computer systems provide hardware interrupts. b. Explain why computer systems do not integrate device drivers along with the kernel part of the OS. c. Explain with the help of a diagram the operation of a DRAM cell. Explain why it requires refreshing. 2. (5 points) A register-memory ISA supports 64 general-purpose registers and a 32-bit memory address space. It permits a single addressing mode for the registers (register direct addressing), and two different addressing modes for the memory (register indirect and autoincrement). It also permits the immediate addressing mode; the immediate can be 6 bits wide. The ML supports a total of 1264 opcodes, with the following breakup:
An opcode can use any addressing mode for each of its operands. Design a fixed-length instruction encoding to allow all of the instructions to be encoded using the minimum number of bits. Note: As an opcode can use any of the addressing modes for each of its operands, you would need to set apart enough bits for specifying the addressing mode of each operand. 3. (6 points) Assuming a direct mapped cache with 16 4-word blocks, label the following references as a hit or a miss, and show the contents of the cache after each cycle. Assume that the cache is initially empty. The referenced addresses are 20, 17, 1, 4, 8, 5, 56, 89, 100, 120, 100, 104, 108, 8, 4.
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