Event

Distinguished Colloquium in Electrical and Computer Engineering 
Hosted by Booz Allen Hamilton

"3D Integrated CMOS-Memristor Hybrid Circuits: Devices, Integration, Architecture, and Applications"

Professor Tim Cheng
University of California, Santa Barbara

Abstract:

I will give an overview of our recent research efforts on monolithic 3D integration of CMOS and memristive nanodevices. These hybrid circuits combine a CMOS subsystem with multiple layers of nanowire crossbars, consisting of arrays of two-terminal memristors, all connected by an area-distributed interface between the CMOS subsystem and the crossbars. Combining the advantages of CMOS technology with the extremely high density of memristors and interface vias, this approach could offer unprecedented memory density and bandwidth at manageable power dissipation, and enable new memory-centric computing paradigms. Specifically, I will highlight our results in four areas: (1) memristive device development and engineering which achieves better performance, endurance and uniformity, (2) 3D monolithic integration of CMOS with up to 8 layers of memristive crossbars, (3) architectures for building low-power, reliable resistive RAM (ReRAM), and (4) applications to bio-inspired mixed-signal computing. 

Biography:

K.T. Tim Cheng received his Ph.D. in EECS from the University of California, Berkeley in 1988. He worked at Bell Laboratories from 1988 to 1993 and joined the faculty at the University of California, Santa Barbara in 1993 where he is currently Associate Vice Chancellor for Research and Professor of ECE. He was the founding director of UCSB’s Computer Engineering Program (1999-2002) and Chair of the ECE Department (2005-2008). His current research interests include design, automation and test for SoC/ photonic IC/flexible electronics, mobile embedded systems and mobile computer vision. He has published more than 400 technical papers, co-authored five books, and holds 12 U.S. Patents in these areas. He currently serves as the PI for DoD/AFOSR MURI project for 3D hybrid circuits which aims at integrating CMOS with high-density memristors.