ENEE 244: Digital Logic Design
Instructor: Dr Ankur Srivastava
1349 A.V. Williams Building
301 405 0434, firstname.lastname@example.org
Textbooks: Digital Principles and Design, Donald Givone, McGraw Hill 2003
Lecture Information Time: MWF 10:00-10:50am JMP 3201
Instructor: Dr Ankur Srivastava, 1349 A.V. Williams Building, email@example.com,
Office Hours: M-W 11-12:30pm, or by appointment
Grading Policy Homework : 20 % 2 Midterms : 20% Each End Term: 40%
- "All exams will be closed book, closed notes, no calculators or
PDAs, and please turn off the cell phones.
- " There will NOT be any make-up midterm exams. If you have to miss
a Mid- Term, then you must get Dr Srivastava s permission at-least 2 days
before the exam. In that case your other midterm will be counted twice. If
you do not take permission then you get a 0. If you miss both Mid Terms with
Dr Srivastava s permission, you will be graded out of your finals. You get
a 0 if no permission is taken at least 2 days in advance.
- " Please contact Dr Srivastava within 1 week of the date of return
if you contest your score in the mid-term. No changes will be made after
- " Check final exam schedule before enrolling for the course. Professor
Charles Silio is offering another section.
- " If any exam (especially the final exam) is scheduled on a religious
holiday that you are compelled to observe and you must make arrangement to
take the exam on a different date, please see Dr Srivastava about making
- " Academic dishonesty will not be tolerated. The University Code
of Academic Integrity, which can be found at http://www.inform.umd.edu/CampusInfo/Departments/JPO/
prohibits students from committing the following acts of academic dishonesty:
cheating, fabrication, facilitating academic dishonesty, and plagiarism.
Academic dishonesty in this class includes outright copying on homework; however,
discussing homework problems and exchanging tips is permissible and also
encouraged. If there are any take-home exams, discussing the material with
anyone, inside or outside of the class, is considered academic dishonesty.
Instances of academic dishonesty will be referred to Office of Judicial Programs.
- " There will be several homeworks. Homework assignments will be
posted on the course webpage and announced in the lecture, normally at least
one week before the due date. Homework will be collected in class on the
due date and the graded homework will be returned to you in the recitation
- " Late homework will not be accepted. If you must miss a lecture
where a homework assignment is due, it is your responsibility to find a reliable
person to turn your homework in for you or submit it to Dr. Srivastava or
your recitation TA before the due date.
- " Both effort and correctness will be counted when your homework
is graded. It is important that you do the homework problems in the same
order as they are assigned.
- " If you dispute your score on any homework, you have to contact
your recitation TA within one week from the date that your homework is officially
returned (normally in recitation). If the matter remains unsettled, you have
one more week to bring the issue to Dr. Srivastava with a written request.
- " Make sure that you include the following information on the first
page of your homework: full name, student ID, and your recitation section
number (on the upper right corner). Failure to do so will result in late
grading of your homework, and you may consequently miss the one-week period
to dispute your score.
- " It is acceptable, and you are encouraged, to discuss homework
problems with others, but you have to prepare the final write-up by yourself.
Both copying homework and allowing others to copy your homework will be considered
as academic dishonesty (see above in the last item in the Exam section).
Broad Course Topics (subject to change)
1. Binary Numbers a. Binary Arithmetic b. Binary Conversion c. Binary
Codes d. Error Detection and Correction
2. Boolean Algebra a. Canonical Forms b. Boolean Manipulations c. Gates
and Combinational Networks d. Don t Cares e. Gate Properties
3. Simplification of Boolean Algebra, a. Prime Implicants b. Karnaugh
Maps c. Quine-McCluskey Methods
4. Logic Devices and Components a. Adders, Subtractersb. Decoders, Encoders,
Multiplexers c. PLAs and PALs, ROMs
5. Latches and Flip Flops
6. Sequential and Synchronous and Asynchronous Circuits
7. Wired Logic, Control Logic and Logic Gate Characteristics
TA: Fiorella Haim firstname.lastname@example.org
11:00am-11:50am (EGR 3114) Wed 9:00am- 9:50am (EGR 3114) Wed 11:00am-11:50am
(CHE 2116) Tue 12:30pm- 1:20pm (CHE 2116) Tue
Questions and Comments: email@example.com