Textbooks:

G.D. Hachtel and F. Somenzi, Logic Synthesis and Verification Algorithms, Kulwer Academic
Publishers

References:

S. Devadas, A. Ghosh and K. Keutzer, Logic Synthesis, Mc-Graw Hill Series
G. De-Micheli, Synthesis and Optimization of Digital Circuits, Mc-Graw  Hill Series

Course Description:

This course covers the theory and techniques of synthesis and optimization of digital
systems.  In particular, we will study in a sequence the theory, design, and implementation
of computer-aided design (CAD) tools used in logic synthesis, architectural synthesis, and
system-level synthesis. This semester we focus on logic synthesis and optimization. The
core topics include: graph terminologies and problems, fundamental algorithms, boolean
algebra, logic-level synthesis and optimization techniques for 1) two-level circuits, 2)
multi-level circuits, and 3) sequential circuits. On completion of this course, students
should understand the essential logic synthesis algorithms and tools, be able to reason
about problems in logic synthesis in general and be capable of reading critically the
recent literature.

Lectures:

Monday  and Wednesday:   2:00pm- 3:15pm (EGR 1202)
Office Hours: Monday and Wednesday: 3:30-4:30pm (1349 A.V. Williams Building)

Logistics:

Homeworks: 20%
Midterm Exam/Midterm Paper: 20%
Project: 40%
Final Exam: 20%