/*************************************************************************/ /* t549.h */ /* Copyright (c) 1997 DSP Research, Inc. */ /*************************************************************************/ #ifndef _T549_H #define _T549_H /* RED LED to the left */ #define LED_ON() asm(" SSBX XF ") #define LED_OFF() asm(" RSBX XF ") #ifndef _VUINT_ typedef volatile unsigned int VUINT; #define _VUINT_ 1 #endif #ifndef _UINT_ typedef unsigned int Uint; #define _UINT_ 1 #endif /*CPU memory mapped registers for c541 and c542*/ #define C5XX_IFR (*(VUINT *)0x01) /* Interrupt Flag Register */ #define C5XX_IMR (*(VUINT *)0x00) /* Interrupt Mask Register */ #define C5XX_ST0 (*(VUINT *)0x06) /* Status Register ST0 */ #define C5XX_ST1 (*(VUINT *)0x07) /* Status Register ST1 */ #define C5XX_AL (*(VUINT *)0x08) /* ACCUMULATOR A Low Word */ #define C5XX_AH (*(VUINT *)0x09) /* ACCUMULATOR A High Word */ #define C5XX_AG (*(VUINT *)0x0A) /* ACCUMULATOR A Guard Bits */ #define C5XX_BL (*(VUINT *)0x0B) /* ACCUMULATOR B Low Word */ #define C5XX_BH (*(VUINT *)0x0C) /* ACCUMULATOR B High Word */ #define C5XX_BG (*(VUINT *)0x0D) /* ACCUMULATOR B Guard Bits */ #define C5XX_TREG (*(VUINT *)0x0E) /* Temporary Register */ #define C5XX_TRN (*(VUINT *)0x0F) /* Transition Register */ #define C5XX_AR0 (*(VUINT *)0x10) /* Auxiliary Register 0 */ #define C5XX_AR1 (*(VUINT *)0x11) /* Auxiliary Register 1 */ #define C5XX_AR2 (*(VUINT *)0x12) /* Auxiliary Register 2 */ #define C5XX_AR3 (*(VUINT *)0x13) /* Auxiliary Register 3 */ #define C5XX_AR4 (*(VUINT *)0x14) /* Auxiliary Register 4 */ #define C5XX_AR5 (*(VUINT *)0x15) /* Auxiliary Register 5 */ #define C5XX_AR6 (*(VUINT *)0x16) /* Auxiliary Register 6 */ #define C5XX_AR7 (*(VUINT *)0x17) /* Auxiliary Register 7 */ #define C5XX_SP (*(VUINT *)0x18) /* Stack Pointer */ #define C5XX_BK (*(VUINT *)0x19) /* Circular Buffer size register */ #define C5XX_BRC (*(VUINT *)0x1A) /* Block Repeat Counter */ #define C5XX_RSA (*(VUINT *)0x1B) /* Block Repeat Start Address */ #define C5XX_REA (*(VUINT *)0x1C) /* Block Repeat End Address */ #define C5XX_PMST (*(VUINT *)0x1D) /* Processor Mode Status Reg. */ #define C5XX_XPC (*(VUINT *)0x1E) /* Processor Mode Status Reg. */ /*!!!! PERIPHERAL MEMORY-MAPPED REGISTERS FOR C542 ONLY !!!! */ #define C5XX_BDRR0 (*(VUINT *)0x20) /* Buffered serial port 0 data receive register */ #define C5XX_BDXR0 (*(VUINT *)0x21) /* Buffered serial port 0 data transmit register */ #define C5XX_BSPC0 (*(VUINT *)0x22) /* Buffered serial port 0 control register */ #define C5XX_BSPCE0 (*(VUINT *)0x23) /* Buffered serial port 0 control extension register */ #define C5XX_TIM (*(VUINT *)0x24) /* Timer Register */ #define C5XX_PRD (*(VUINT *)0x25) /* Timer Period Register */ #define C5XX_TCR (*(VUINT *)0x26) /* Timer Control Register */ #define C5XX_SWWSR (*(VUINT *)0x28) /* S/W Wait-State Reg */ #define C5XX_BSCR (*(VUINT *)0x29) /* Bank-switching Ctl Register */ #define C5XX_HPIC (*(VUINT *)0x2C) /* Host Port Interface Control Reg */ #define C5XX_TRCV (*(VUINT *)0x30) /* TDM serial port data receive Reg*/ #define C5XX_TDXR (*(VUINT *)0x31) /* TDM serial port data transmit register */ #define C5XX_TSPC (*(VUINT *)0x32) /* TDM serial port control register*/ #define C5XX_TCSR (*(VUINT *)0x33) /* TDM serial port channel select register */ #define C5XX_TRTA (*(VUINT *)0x34) /* TDM serial port receive/transmit register */ #define C5XX_TRAD (*(VUINT *)0x35) /* TDM serial port receive address register */ #define C5XX_AXR0 (*(VUINT *)0x38) /* ABU 0 transmit address register */ #define C5XX_BKX0 (*(VUINT *)0x39) /* ABU 0 transmit buffer-size register */ #define C5XX_ARR0 (*(VUINT *)0x3A) /* ABU 0 receive address register */ #define C5XX_BKR0 (*(VUINT *)0x3B) /* ABU 0 receive buffer-size register */ /* END C542 PERIPHERAL MEMORY MAPPED REGISTERS*/ #define C5XX_AXR1 (*(VUINT *)0x3C) /* ABU 1 transmit address register */ #define C5XX_BKX1 (*(VUINT *)0x3D) /* ABU 1 transmit buffer-size register */ #define C5XX_ARR1 (*(VUINT *)0x3E) /* ABU 1 receive address register */ #define C5XX_BKR1 (*(VUINT *)0x3F) /* ABU 1 receive buffer-size register */ #define C5XX_BDRR1 (*(VUINT *)0x40) /* Buffered serial port 1 data receive register */ #define C5XX_BDXR1 (*(VUINT *)0x41) /* Buffered serial port 1 data transmit register */ #define C5XX_BSPC1 (*(VUINT *)0x42) /* Buffered serial port 1 control register */ #define C5XX_BSPCE1 (*(VUINT *)0x43) /* Buffered serial port 1 control extension register */ #define C5XX_CLKMD (*(VUINT *)0x58) /* Clock Mode Register 548/549 */ /* END C548 PERIPHERAL MEMORY MAPPED REGISTERS */ #define SWWSR_XPA BIT(15) #define SWWSR_IO(x) ((0x7 & (x)) << 12) #define SWWSR_DATAH(x) ((0x7 & (x)) << 9) #define SWWSR_DATAL(x) ((0x7 & (x)) << 6) #define SWWSR_PROGH(x) ((0x7 & (x)) << 3) #define SWWSR_PROGL(x) ((0x7 & (x)) << 0) #define PLLSTATUS BIT(0) #define PLLNDIV(x) ((x) ? BIT(1):0) #define PLLON_OFF(x) ((x) ? BIT(2):0) #define PLLCOUNT(x) ((0xff & (x)) << 3) #define PLLDIV(x) ((x) ? BIT(11):0) #define PLLMUL(x) ((0xf & (x)) << 12) #define C548_INITPLL(M) {\ C5XX_CLKMD = \ PLLMUL(M) | PLLCOUNT(0xff) | PLLON_OFF(1) | PLLNDIV(1) | PLLDIV(0); \ while (!(C5XX_CLKMD & PLLSTATUS)); \ } ioport unsigned port0; ioport unsigned port4000; ioport unsigned port4001; ioport unsigned port4002; ioport unsigned port4003; ioport unsigned port8000; ioport unsigned port8001; ioport unsigned port8002; ioport unsigned port8003; ioport unsigned port8004; ioport unsigned port8005; ioport unsigned port8006; #define T54X_STAT port4000 /* Status register */ #define T54X_CMD0 port4000 /* Command 0 register */ #define T54X_CMD1 port4001 /* Command 1 register */ #define T54X_CCLK port4002 /* CODEC Control Register Clock */ #define T54X_DA port4003 /* D/A converters */ #define T54X_XFR port0 /* Transfer register */ #define UART_0 port8000 /* UART address 0 */ #define UART_1 port8001 /* UART address 0 */ #define UART_2 port8002 /* UART address 0 */ #define UART_3 port8003 /* UART address 0 */ #define UART_4 port8004 /* UART address 0 */ #define UART_5 port8005 /* UART address 0 */ #define UART_6 port8006 /* UART address 0 */ /* interrupt number (K) */ #define INTRS 0x0 #define INTNMI 0x1 #define INTSW17 0x2 #define INTSW18 0x3 #define INTSW19 0x4 #define INTSW20 0x5 #define INTSW21 0x6 #define INTSW22 0x7 #define INTSW23 0x8 #define INTSW24 0x9 #define INTSW25 0xa #define INTSW26 0xb #define INTSW27 0xc #define INTSW28 0xd #define INTSW29 0xe #define INTSW30 0xf #define INT0 0x10 #define INT1 0x11 #define INT2 0x12 #define TINT 0x13 #define BRINT0 0x14 #define BXINT0 0x15 #define TRINT 0x16 #define TXINT 0x17 #define INT3 0x18 #define HPIINT 0x19 #define BRINT1 0x1a #define BXINT1 0x1b #define BMINT0 0x1c #define BMINT1 0x1d int C54X_detect(void); /* detect cpu type */ void RS232_init(long baud, int length, int stop, int parity, int even); int RS232_getchar(void); int RS232_putchar(int c); int RS232_kbhit(void); int RS232_puts(char * s); void RS232_delay(void); unsigned T5XX_control0(unsigned mask, unsigned pattn); unsigned T5XX_control1(unsigned mask, unsigned pattn); unsigned T5XX_status(void); void T5XX_delay_us(unsigned long t); #define BIT(n) ((1)<<(n)) /* Status Register, bit summary */ #define T54X_CDOUT BIT(0) #define T54X_ADINTN BIT(1) #define T54X_PSQ BIT(2) #define T54X_R_L BIT(3) #define T54X_PCIRQ BIT(4) #define T54X_HTCRE BIT(5) #define T54X_CTHRF BIT(6) #define T54X_TFCLR BIT(7) #define T54X_NU 0xff00 /* Control Register 0, bit summary */ #define T54X_EXT_ROM_DISABLE BIT(0) #define T54X_UART_RESETN BIT(1) #define T54X_CTFCLRN BIT(2) #define T54X_C54XIRQ BIT(3) #define T54X_LED0 BIT(4) #define T54X_LED_YELLOW BIT(4) #define T54X_LED1 BIT(5) #define T54X_LED_GREEN BIT(5) #define T54X_LED2 BIT(6) #define T54X_LED_RED BIT(6) #define EPROM_BANK (BIT(7)|BIT(8)|BIT(9)) #define RESERVED1 (BIT(10)|BIT(11)|BIT(12)|BIT(13)|BIT(14)|BIT(15)) /* Control Register 1, bit summary */ #define T54X_OFF_HOOK BIT(0) #define T54X_PORTSEL BIT(1) #define T54X_RCHAN BIT(2) #define T54X_LCHAN BIT(3) #define T54X_CCSN BIT(4) #define T54X_OSCSEL BIT(5) #define T54X_MF6 BIT(6) #define T54X_MF7 BIT(7) #define T54X_MF8 BIT(8) #define T54X_GPOUT0 BIT(9) #define T54X_GPOUT1 BIT(10) #define RESERVED2 (BIT(11)|BIT(12)|BIT(13)|BIT(14)|BIT(15)) #endif /* _T549_H */