/*****************************************************************/ /* Program c541evm.c */ /* This program provides a starting point for C541 EVM */ /* programs. It shows how to initialize the C541 and the */ /* TLC320AC01C analog interface circuit using C statements. */ /* */ /* Author: S.A. Tretter */ /* Date: March 26, 1999 */ /* Affiliation: Department of Electrical Engineering */ /* University of Maryland, College Park */ /*****************************************************************/ #include "aic_01c.h" #include "c54xregs.h" #include #include #include #include #include /* Declare all function prototypes */ void init_aic(void); void init_c541(void); void inline disable_ints(void); void inline enable_ints(void); /* The EVM uses address 14 (bit 15) of IO space for AIC reset */ volatile ioport unsigned port14; void main(void) { int received_sample; init_c541(); disable_ints(); /* Turn off all maskable interrupts */ /****************************************************************/ /* Warning: Initialize any long arrays before turning on the */ /* AIC. The AIC can't wait for samples to be written into */ /* its DXR. They must be ready when requested. The initiali- */ /* zation can be done here. */ /****************************************************************/ init_aic(); IFR = 0xFFFF; /* Clear any pending interrupt requests */ received_sample = DRR1; /* Dummy read to clear DRR1 */ enable_ints(); /* Allow interrupts to be serviced */ /*****************************************************************/ /* Now the C541 and AIC are initialized to your desired state. */ /* Include the program to accomplish your desired task below. */ /*****************************************************************/ for(;;); /* A dummy do nothing infinite loop */ } /* End of main() */ /*****************************************************************/ /* init_aic() initializes the TLC320AC01C analog interface */ /* circuit control register. */ /*---------------------------------------------------------------*/ void init_aic(void) { /*****************************************************************/ /* Declare the AIC register scratch-pad variables. The */ /* structures are defined in aic_01c.h. */ /*****************************************************************/ AIC_REGISTER_STD aic_register_1; /* A register */ AIC_REGISTER_STD aic_register_2; /* B register */ AIC_REGISTER_AP aic_register_3; /* A' register */ AIC_REGISTER4 aic_register_4; /* Amplifier gain-select register */ AIC_REGISTER5 aic_register_5; /* Analog configuration register */ AIC_REGISTER6 aic_register_6; /* Digital configuration register */ AIC_REGISTER_STD aic_register_7; /* Frame-sync delay register */ AIC_REGISTER_STD aic_register_8; /* Frame-sync number register */ /*****************************************************************/ /*****************************************************************/ /* Formulas for the AIC sampling rate, fs, lowpass filter */ /* cutoff frequency, f(LP), highpass filter cutoff frequency, */ /* f(HP), and serial data shift clock rate, SCLK. */ /* */ /* f(MCLK) = 10.368 MHz = input master clock frequency from */ /* a crystal oscillator */ /* */ /* SCLK = serial shift clock= f(MCLK)/4 = 2.592 MHz */ /* */ /* FCLK = switched capcitor filter clock = f(MCLK)/(2xA) */ /* */ /* With no advance/retard, i.e., control bits = 00 */ /* fs = sampling frequency = f(MCLK)/ (2xAxB) */ /* With control bits = 01 */ /* fs = f(MCLK)/(2xAxB + A') */ /* With control bits = 10 */ /* fs = f(MCLK)/(2xAxB - A') */ /* */ /* f(LP) = lowpass filter cutoff = FCLK/40 = f(MCLK)/(80xA) */ /* */ /* f(HP) = highpass filter cutoff = fs/200 = f(MCLK)/(400xAxB) */ /*****************************************************************/ /*---------------------------------------------------------------*/ /* Set the A Register scratchpad */ /*---------------------------------------------------------------*/ aic_register_1.register_data = 36; /* A = 36 -> FCLK = 144 kHz */ /* f(LP) = 3.6 kHz */ aic_register_1.register_address = 1; aic_register_1.r_notw = 0; /* Write to register */ aic_register_1.control_bits = 0; /* no advance/retard (see AIC */ /* manual the other three options) */ /*---------------------------------------------------------------*/ /* Set the B Register scratchpad */ /*---------------------------------------------------------------*/ aic_register_2.register_data = 18; /* B = 18 -> fs = 8 kHz */ /* f(HP) = 40 Hz */ aic_register_2.register_address = 2; aic_register_2.r_notw = 0; aic_register_2.control_bits = 0; /*---------------------------------------------------------------*/ /* Set the A' Register scratchpad. The default reset value is */ /* A' = 0. */ /*---------------------------------------------------------------*/ aic_register_3.register_data = 0; /* A' = 0 */ aic_register_3.register_address = 3; aic_register_2.r_notw = 0; aic_register_2.control_bits = 0; /*---------------------------------------------------------------*/ /* Set Amplifier Gain-Select Register scratchpad. */ /* DS07,...,DS00 reset default = 00000101 */ /*---------------------------------------------------------------*/ aic_register_4.analog_out_gain = 0; /* 0 dB */ aic_register_4.analog_in_gain = 0; /* 0 dB */ aic_register_4.mon_out_gain = 0; /* squelch */ aic_register_4.ds0607 = 0; /* don't cares */ aic_register_4.register_address= 4; aic_register_4.r_notw = 0; aic_register_4.control_bits = 0; /*---------------------------------------------------------------*/ /* Set Analog Configuration Register scratchpad. */ /* DS07,...,DS00 reset default = xxxx0001 */ /*---------------------------------------------------------------*/ aic_register_5.input_select = 1; /* Enable IN+ and IN- */ aic_register_5.highpass_filt = 0; /* Higpass filter enabled*/ aic_register_5.ds03 = 0; /* Must be 0 */ aic_register_5.ds7_4 = 0; /* Don't cares */ aic_register_5.register_address = 5; aic_register_5.r_notw = 0; aic_register_5.control_bits = 0; /*---------------------------------------------------------------*/ /* Set Digital Configuration Register scratchpad */ /* DS07,...,DS00 reset default = 00000000 */ /*---------------------------------------------------------------*/ aic_register_6.power_down = 0; /* Power-down external */ aic_register_6.software_reset = 0; /* Inactive reset */ aic_register_6.second_comm = 0; /* Normal operation */ aic_register_6.ignore_primary = 0; /* Normal operation */ aic_register_6.fsd_disable = 0; /* FSD enable */ aic_register_6.adc_free_run = 0; /* free run inactive */ aic_register_6.ds8_7 = 0; /* Don't cares */ aic_register_6.register_address = 6; aic_register_6.r_notw = 0; aic_register_6.control_bits = 0; /*---------------------------------------------------------------*/ /* Set Frame-Sync Delay Register scratchpad */ /* DS07,...,DS00 reset default = 00000000 */ /*---------------------------------------------------------------*/ aic_register_7.register_data = 0; aic_register_7.register_address = 7; aic_register_7.r_notw = 0; aic_register_7.control_bits = 0; /*---------------------------------------------------------------*/ /* Set Frame-Sync Number Register scratchpad */ /* DS07,...,DS00 reset default = 00000001 */ /*---------------------------------------------------------------*/ aic_register_8.register_data = 1; /* Number of frame syncs */ aic_register_8.register_address = 8; aic_register_8.r_notw = 0; aic_register_8.control_bits = 0; /*---------------------------------------------------------------*/ /* Put AIC in reset by setting bit 15 of IO port 14 to 0 */ port14 = 0x0; /* Initialize Serial Port Control Register 1 (SPC1) as follows: */ /* F0 = 0, 16-bit mode bit 2 */ /* FSM = 1, Burst Mode bit 3 */ /* MCM = 0, External Clock Source bit 4 */ /* TXM = 0, External Frame Sync bit 5 */ /* ~XRST = 0, Reset Transmitter and halt bit 6 */ /* ~RRST = 0, Reset Receiver and halt bit 7 */ /* SOFT = 1, On halt, stop clock after */ /* current word sent bit 14 */ /* all other bits are 0 */ /* SPC1 = [0100 0000 0000 1000] = 0x4008 */ SPC1 = 0x4008; /* Halt, reset, set mode as above */ /* Now set ~XRST = ~RRST = 1 to start serial port */ /* SPC1 = [0100 0000 1100 1000] = 0x40C8 */ SPC1 = 0x40C8; /* Start serial port 1 */ DXR1 = 0; /* Write a dummy word to serial port */ /* Pull AIC out of reset by setting bit 15 to 1 */ port14 = 0x8000; /* Program the AIC registers */ while(!(SPC1 & 0x800)); /* Wait for XRDY bit = 1 */ DXR1 = 0x0003; /* Tell AIC to request a secondary command word */ while(!(SPC1 & 0x800)); /* Wait for XRDY bit = 1 */ DXR1 = *( (int *) &aic_register_1 ); /* Set A Register */ while(!(SPC1 & 0x800)); /* Wait for XRDY = 1 */ DXR1 = 0x0003; /* Request a command word */ while(!(SPC1 & 0x800)); /* Wait for XRDY bit = 1 */ DXR1 = *( (int*) &aic_register_2 ); /* Set B Register */ /****************************************************************/ /* All the remaining AIC registers are left at their default */ /* reset values. */ /****************************************************************/ IMR = 0x40; /* Enable Serial Port 1 reciever interrupts by */ /* setting bit 6 (RINT1) in the Interrupt Mask */ /* Register (IMR) */ } /* end of init_aic() */ void init_c541(){ /* Set 0 wait states for external memory and 2 for IO */ /* Software Wait-State Register (SWWSR) Bit Summary */ /* Reset */ /* Bit Name Value Function */ /* 15 Reserved 0 /* 14-12 I/O 1 Wait states for I/O space 0000-FFFFh */ /* 11-9 Data 1 Wait states for data space 8000-FFFFh */ /* 8-6 Data 1 Wait states for data space 0000-7FFFh */ /* 5-3 Program 1 Wait states for program space 8000-FFFFh */ /* 2-0 Program 1 Wait states for program space 0000-7FFFh */ SWWSR = 0x2000; /* Set OVLY bit to overlay onchip RAM onto program space. */ /* Set bit 5 of Processor Mode Status Register (PMST) */ PMST |= 0x0020; /* Clear all flags in the Interrupt Flags Register (IFR) */ IFR = 0xFFFF; } /* End of init_c541() */ /* Function to disable all maskable interrupts */ void inline disable_ints() { asm( " ssbx INTM"); } /* Function to enable all maskable interrupts */ void inline enable_ints() { asm( " rsbx INTM"); }