In the syllabus below, all sections on Pentium 4 and 8051 are excluded, despite not being specifically excluded!!
In a few cases we will look at the Ultrasparc III ISA, but only occasionally.

Here are the included sections from the texbook, roughly in the order of coverage.

For the final exam, everything listed below (from chapter 1 to 7) is included!

Portion before Midterm I:

Chapter 1: 1.1, 1.2, 1.3.1, 1.3.2, 1.4.2.
    - Specific historic facts will not be asked for in exams, but historic trends may be.
Chapter 2: 2.1, 2.2 (except 2.2.4 and 2.2.6)
Chapter 4: 4.5.1 (except set-associative caches)
Chapter 2: 2.3 (up to section 2.3.5)

Portion before Midterm II:  // Only the material below is in syllabus for Midterm II

Chapter 2: Sections 2.3.6 to 2.3.11.
Chapter 5: 5.1, 5.2, 5.3, 5.4 (except 5.4.8 and 5.4.10), 5.5, 5.6 (except 5.6.3)
Chapter 6: 6.1 (upto and including 6.1.4)
Note that presentation of virtual memory significantly differs from that in book.

Portion before Final:

Chapter 6: 6.1.5-6.1.7, 6.1.9*, 6.2, 6.3** 
                  * In 6.1.9, TLBs only (not what happens when they miss) are included; the rest of the section is excluded.
                  ** In section 6.3, the presentation in the class is very different from the book.  We did not cover the extended example in figure 6-25 and 6-28.  You do not need to read it for the exam.  However, the description of semaphores at the start of section 6.3.3 is in syllabus.
Chapter 7: 7.1, 7.2, 7.3, 7.4 (excluding 7.4.4).