In the syllabus below, all sections on Pentium 4 and 8051 are excluded, despite not being specifically excluded!!
In a few cases we will look at the Ultrasparc III ISA, but only occasionally.

Here are the included sections from the texbook, roughly in the order of coverage.

Portion before Midterm I:

Chapter 1: 1.1, 1.2, 1.3.1, 1.3.2, 1.4.2.
    - Specific historic facts will not be asked for in exams, but historic trends may be.
Chapter 2: 2.1, 2.2 (except 2.2.4 and 2.2.6)
Chapter 4: 4.5.1 (except set-associative caches)
Chapter 2: 2.3 (except 2.3.6)
Chapter 5: 5.1, 5.2.

Portion before Midterm II:

Chapter 5: 5.3, 5.4 (except 5.4.8 and 5.4.10), 5.5, 5.6 (except 5.6.3)
Chapter 6: 6.1 (upto and including 6.1.5).  Also section 6.1.9 includes a discussion of the TLB -- please study that.  In that section, TLBs are included, but TSBs are not.
    Note that presentation of virtual memory in the lectures differs significantly from that in book.