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Event Information Booz Allen Colloquium: Sachin Sapatnekar, Univ. of Minnesota, "Changing Times: On-Chip Variability" Friday, September 24, 2010 3:00 p.m. Kim Engineering Building, Lecture Hall, Rm. 1110 For More Information: Jess Molina 301 405 4471 jmolina2@umd.edu http://www.ece.umd.edu/colloquium Booz Allen Hamilton Distinguished Colloquium in Electrical and Computer Engineering "Changing Times and Power Struggles: Dealing with On-Chip Variability" Prof. Sachin Sapatnekar Robert and Marjorie Henle Chair, Department of Electrical and Computer Engineering, University of Minnesota Abstract: In older integrated circuit design paradigms, timing was a well-characterized constant and power could be estimated deterministically. With CMOS technologies shrinking to nanometer scales and with the introduction of new design paradigms such as 3D integration, increased levels of randomness are seen due to process and environmental variations. The results are profound: circuit delay times change significantly from one manufactured part to the next, and designers struggle in their quest to define the power dissipation of their chip. This talk begins by overviewing the roots of these changes and their effects on next-generation high-performance designs, and then presents techniques for overcoming these challenges. Such approaches include presilicon analyses as well as post-silicon techniques, which must work in partnership to achieve predictability in the face of randomness. We first examine methods for analyzing variations, then for optimizing them to the extent possible, and finally, for mitigating the effects of variations that cannot be reduced. Bio: Sachin Sapatnekar received his Ph.D. from the University of Illinois at Urbana-Champaign in 1992. He is currently at the University of Minnesota, where he holds the Distinguished McKnight University Professorship and the Henle Professorship in ECE. His research is related to developing CAD techniques for the analysis and optimization of circuit performance. He has served as General Chair for the 2010 ACM/IEEE Design Automation Conference (DAC) and is currently Editor-in-Chief of the IEEE Transactions on CAD. He is a recipient of the NSF Career Award, six conference Best Paper awards, and the SRC Technical Excellence award. He is a fellow of the IEEE. This Event is For: Campus • Clark School • All Students • Graduate • Undergraduate • Prospective Students • Faculty • Staff • Post-Docs • Corporate • Donors

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