CSM Project Publications

This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright.

A BibTeX file containing bibliographic information for all publications listed here is also available.

Globally, this publication list is ordered in reverse chronological order. Within a given year, the ordering is alphabetical (by author name).

The primary sponsor of the DSPCAD Group's work in this research area is the US National Science Foundation.

We are also grateful to the following sponsors, who have supported the research in Maryland DSPCAD Research Group at large: Agilent Technologies; Angeles Design Systems, Inc.; the Austrian Marshall Plan Foundation; CoolCAD Electronics; the Defense Advanced Research Projects Agency; the Department of Homeland Security; the Fulbright Specialists Program of the Council for International Exchange of Scholars; the Laboratory for Physical Sciences; the Laboratory for Telecommunication Sciences; Management Communications and Control, Inc.; the Maryland Industrial Partnerships (MIPS) Program; National Instruments; the National Institute of Standards and Technology; the National Radio Astronomy Observatory; Northrop Grumman Corp.; the Semiconductor Research Corporation; Techno-Sciences, Inc.; Texas Instruments, Inc.; Trident Systems, Inc.; the University of Maryland Graduate School; the US Air Force Office of Scientific Research under the Dynamic Data Driven Applications Systems (DDDAS) Program; the US Air Force Research Laboratory; the US Army Research Laboratory; the US Army Research Office; and the US National Science Foundation.

DSPCAD Group Website.



Publications are listed for some or all of the following years:
2017, 2016, 2015, 2014, 2013, 2012, 2011, 2010, 2009, 2008, 2007, 2006, 2005, 2004, 2003, 2002, 2001, 2000, 1999, 1998, 1997, 1996, 1995, 1994, 1993 Bibliography generated from contentsIn.bib
[lin2018x1]
S. Lin, J. Wu, and S. S. Bhattacharyya. Memory-constrained vectorization and scheduling of dataflow graphs for hybrid CPU-GPU platforms. ACM Transactions on Embedded Computing Systems, 2018. To appear; preprint available at url http://arxiv.org/abs/1711.11154.

[sapi2018x1]
A. Sapio, L. Li, J. Wu, M. Wolf, and S. S. Bhattacharyya. Reconfigurable digital channelizer design using factored Markov decision processes. Journal of Signal Processing Systems, 2018. To appear; preprint available at url http://arxiv.org/abs/1712.08340.

[ha2017x1]
S. Ha, J. Teich, C. Haubelt, M. Glaß, T. Mitra, R. Dömer, P. Eles, A. Shrivastava, A. Gerstlauer, and S. S. Bhattacharyya. Introduction to hardware/software codesign. In S. Ha and J. Teich, editors, Handbook of Hardware/Software Codesign, pages 1-24. Springer, 2017.

[li2017x2]
L. Li, A. Ghazi, J. Boutellier, L. Anttila, M. Valkama, and S. S. Bhattacharyya. Evolutionary multiobjective optimization for adaptive dataflow-based digital predistortion architectures. EAI Endorsed Transactions on Cognitive Communications, 3(10):1-9, February 2017.

[li2017x3]
L. Li, A. Sapio, J. Wu, Y. Liu, K. Lee, M. Wolf, and S. S. Bhattacharyya. Design and implementation of adaptive signal processing systems using Markov decision processes. In Proceedings of the International Conference on Application Specific Systems, Architectures, and Processors, pages 170-175, Seattle, Washington, July 2017. (PDF)

[pelc2017x1]
M. Pelcat, A. Mercat, K. Desnos, L. Maggiani, Y. Liu, J. Heulot, J.-F. Nezan, W. Hamidouche, D. Menard, and S. Bhattacharyya. Models of architecture: Application to ESL model-based energy consumption estimation. Technical report, IETR/INSA Rennes; Scuola Superiore Sant'Anna, Pisa; Institut Pascal; University of Maryland, College Park; Tampere University of Technology, Tampere, February 2017.

[bhat2016x1]
S. S. Bhattacharyya and M. Wolf. Tools and methodologies for system-level design. In L. Lavagno, I. L. Markov, G. E. Martin, and L. K. Scheffer, editors, Electronic Design Automation for Integrated Circuits Handbook --- Volume 1: EDA for IC System Design, Verification, and Testing, pages 39-58. CRC Press, Taylor & Francis Group, second edition, 2016.

[li2016x3]
L. Li, A. Ghazi, J. Boutellier, L. Anttila, M. Valkama, and S. S. Bhattacharyya. Design space exploration and constrained multiobjective optimization for digital predistortion systems. In Proceedings of the International Conference on Application Specific Systems, Architectures, and Processors, pages 182-185, London, England, July 2016.

[li2016x1]
L. Li, A. Ghazi, J. Boutellier, L. Anttila, M. Valkama, and S. S. Bhattacharyya. Evolutionary multiobjective optimization for digital predistortion architectures. In Proceedings of the International Conference on Cognitive Radio Oriented Wireless Networks, pages 498-510, Grenoble, France, May 2016.

[pelc2016x1]
M. Pelcat, K. Desnos, L. Maggiani, Y. Liu, J. Heulot, J.-F. Nezan, and S. S. Bhattacharyya. Models of architecture: Reproducible efficiency evaluation for signal processing systems. In Proceedings of the IEEE Workshop on Signal Processing Systems, pages 121-126, Dallas, Texas, October 2016.

[sapi2016x1]
A. Sapio, M. Wolf, and S. S. Bhattacharyya. Compact modeling and management of reconfiguration in digital channelizer implementation. In Proceedings of the IEEE Global Conference on Signal and Information Processing, pages 595-599, Washington, D.C., December 2016.

[wolf2016x1]
M. Wolf, S. S. Bhattacharyya, J. Florence, and A. E. Sapio. Power and thermal modeling for communication systems. In Proceedings of the IEEE Workshop on Signal Processing Systems, pages 136-141, Dallas, Texas, October 2016.

[pelc2015x1]
M. Pelcat, K. Desnos, L. Maggiani, Y. Liu, J. Heulot, J.-F. Nezan, and S. S. Bhattacharyya. Models of architecture. Technical Report PREESM/2015-12TR01, IETR/INSA Rennes, 2015. HAL Id: hal-01244470. (PDF)