ENEE 749: Advanced Digital Systems Design

Course Goals:

To study state-of-the-art digital systems design issues and implement new design concepts and techniques into VLSI chips as well as integrate these chips into an entire prototype system.

Course Prerequisites:

ENEE 640 or ENEE 644; and permission of instructor.

Topics Prerequisites:

  • Design experience and knowledge of the following subjects are preferable.
  • Digital systems design and testing.
  • VLSI design and architecture.
  • Digital computer design and architecture.

Course Description:

Using the knowledge and skills gained in earlier courses such as ENEE488Z, ENEE644, and ENEE640, students will work on advanced digital systems design projects individually and/or as a team. The latest design issues such as low-power VLSI systems design and hardware/software co-design are investigated in depth from the current literature. With the use of state-of-the-art CAD tools, all designs are synthesized, evaluated, and sent to MOSIS for VLSI chip fabrication. The grade for the course will be deferred until an evaluation report on the MOSIS chip is completed in a subsequent term. For those students who cannot evaluate their chips in the subsequent semester, alternative arrangements will be made.

Texts:

Technical papers in the current literature.

References:

  • Technical papers in the current literature.
  • Textbooks and references for ENEE488Z/644/640.
  • A library of Computer-Aided Design and Test (CAD/CAT) tool manuals and Test and Measurement equipment manuals (hardcopies and/or on-line documentations).

Core Topics:

  • Review of a current design and test environment.
  • Design of processors (microprocessors, digital signal processors, arithmetic processors, array processors, ASICs)
  • Area/Delay/Power trade-offs
  • Hardware/Software co-design

Course Organization:

The course is presentation/discussion oriented along with hands-on VLSI chip/prototype system design projects. Each student will choose topics among the latest digital systems design issues, research literature, and present his/her findings. In consultation with the instructor, the students will select final individual/team projects. Once completed, their chip designs will be sent to MOSIS, presented in class, and written in reports. When the fabricated chips come back, they will be fully tested and reports will be submitted to the instructor and MOSIS.

Comments:

Current CAD tools include various Mentor Graphics' CAD software, PARTHENON, Octtools, Magic, and SPICE. Current test/measurement equipment include Hewlett-Packard's HP82000/D100 IC Evaluation System and HP1660A Logic Analyzers, and Tektronix' DAS9200 Digital Analysis System.

Last Updated:

November 1995.